Angel M. Burón

According to our database1, Angel M. Burón authored at least 6 papers between 1999 and 2007.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of five.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
Other 

Links

On csauthors.net:

Bibliography

2007
Haar wavelet based processor scheme for image coding with low circuit complexity.
Comput. Electr. Eng., 2007

2006
High Throughput Parallel-Pipeline 2-D DCT/IDCT Processor Chip.
J. VLSI Signal Process., 2006

2005
Parallel-pipeline 8×8 forward 2-D ICT processor chip for image coding.
IEEE Trans. Signal Process., 2005

High throughput 2D DCT/IDCT processor for video coding.
Proceedings of the 2005 International Conference on Image Processing, 2005

2003
Parallel-pipelined architecture for 2-D ICT VLSI implementation.
Proceedings of the 2003 International Conference on Image Processing, 2003

1999
VLSI configurable delay commutator for a pipeline split radix FFT architecture.
IEEE Trans. Signal Process., 1999


  Loading...