Aravinthan Athmanathan

According to our database, Aravinthan Athmanathan authored at least 4 papers between 2014 and 2016.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2016

Multilevel-Cell Phase-Change Memory: A Viable Technology.

Aravinthan Athmanathan, Milos Stanisavljevic, Nikolaos Papandreou, Haralampos Pozidis, Evangelos Eleftheriou

IEEE J. Emerg. Sel. Topics Circuits Syst., 2016

2015

Phase-change memory: Feasibility of reliable multilevel-cell storage and retention at elevated temperatures.

Milos Stanisavljevic, Aravinthan Athmanathan, Nikolaos Papandreou, Haralampos Pozidis, Evangelos Eleftheriou

Proceedings of the IEEE International Reliability Physics Symposium, 2015

Non-resistance metric based read scheme for multi-level PCRAM in 25 nm technology.

Junho Cheon, Insoo Lee, Changyong Ahn, Milos Stanisavljevic, Aravinthan Athmanathan, Nikolaos Papandreou, Haris Pozidis, Evangelos Eleftheriou, Min-Chul Shin, Taekseung Kim, Jong-Ho Kang, Jun Hyun Chun

Proceedings of the 2015 IEEE Custom Integrated Circuits Conference, 2015

2014

A 6-bit drift-resilient readout scheme for multi-level Phase-Change Memory.

Aravinthan Athmanathan, Milos Stanisavljevic, Junho Cheon, Seokjoon Kang, Changyong Ahn, Junghyuk Yoon, Min-Chul Shin, Taekseung Kim, Nikolaos Papandreou, Haris Pozidis, Evangelos Eleftheriou

Proceedings of the IEEE Asian Solid-State Circuits Conference, 2014