Evangelos Eleftheriou

IEEE Trans. Neural Networks Learn. Syst., November, 2023

Time-encoded multiplication-free spiking neural networks: application to data classification tasks.

[BibT_eX]

[DOI]

Ana Stanojevic

Neural Comput. Appl., March, 2023

Differentiable Transportation Pruning.

[BibT_eX]

[DOI]

Bram-Ernst Verhoef

Proceedings of the IEEE/CVF International Conference on Computer Vision, 2023

2022

HERMES-Core - A 1.59-TOPS/mm<sup>2</sup> PCM on 14-nm CMOS In-Memory Compute Core Using 300-ps/LSB Linearized CCO-Based ADCs.

[BibT_eX]

[DOI]

IEEE J. Solid State Circuits, 2022

A 64-core mixed-signal in-memory compute chip based on phase-change memory for deep neural network inference.

[BibT_eX]

[DOI]

CoRR, 2022

On the visual analytic intelligence of neural networks.

[BibT_eX]

[DOI]

CoRR, 2022

Approximating Relu Networks by Single-Spike Computation.

[BibT_eX]

[DOI]

Ana Stanojevic

Proceedings of the 2022 IEEE International Conference on Image Processing, 2022

Speech Recognition Using Biologically-Inspired Neural Networks.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Conference on Acoustics, 2022

2021

An SRAM-Based Multibit In-Memory Matrix-Vector Multiplier With a Precision That Scales Linearly in Area, Time, and Power.

[BibT_eX]

[DOI]

Pier Andrea Francese

Luca Benini

IEEE Trans. Very Large Scale Integr. Syst., 2021

Efficient Pipelined Execution of CNNs Based on In-Memory Computing and Graph Homomorphism Verification.

[BibT_eX]

[DOI]

IEEE Trans. Computers, 2021

Accelerating Inference of Convolutional Neural Networks Using In-memory Computing.

[BibT_eX]

[DOI]

Martino Dazzi

Luca Benini

Frontiers Comput. Neurosci., 2021

Towards efficient end-to-end speech recognition with biologically-inspired neural networks.

[BibT_eX]

[DOI]

CoRR, 2021

Learning in Deep Neural Networks Using a Biologically Inspired Optimizer.

[BibT_eX]

[DOI]

CoRR, 2021

HERMES Core - A 14nm CMOS and PCM-based In-Memory Compute Core using an array of 300ps/LSB Linearized CCO-based ADCs and local digital processing.

[BibT_eX]

[DOI]

Proceedings of the 2021 Symposium on VLSI Circuits, Kyoto, Japan, June 13-19, 2021, 2021

2020

Deep learning incorporating biologically inspired neural dynamics and in-memory computing.

[BibT_eX]

[DOI]

Thomas Bohnstingl

Nat. Mach. Intell., 2020

Convergence Behavior of DNNs with Mutual-Information-Based Regularization.

[BibT_eX]

[DOI]

Hlynur Jónsson

Entropy, 2020

Short-term synaptic plasticity optimally models continuous environments.

[BibT_eX]

[DOI]

Timoleon Moraitis

CoRR, 2020

Online spatio-temporal learning in deep neural networks.

[BibT_eX]

[DOI]

CoRR, 2020

Compiling Neural Networks for a Computational Memory Accelerator.

[BibT_eX]

[DOI]

CoRR, 2020

Mixed-precision deep learning based on computational memory.

[BibT_eX]

[DOI]

Urs Egger

Anastasios Petropoulos

CoRR, 2020

Accurate Emulation of Memristive Crossbar Arrays for In-Memory Computing.

[BibT_eX]

[DOI]

Anastasios Petropoulos

Irem Boybat

Proceedings of the IEEE International Symposium on Circuits and Systems, 2020

ESSOP: Efficient and Scalable Stochastic Outer Product Architecture for Deep Learning.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Symposium on Circuits and Systems, 2020

Accelerating Spiking Neural Networks using Memristive Crossbar Arrays.

[BibT_eX]

[DOI]

Thomas Bohnstingl

Proceedings of the 27th IEEE International Conference on Electronics, Circuits and Systems, 2020

Temperature Compensation Schemes for In-Memory Computing using Phase-Change Memory.

[BibT_eX]

[DOI]

Iason Giannopoulos

Proceedings of the 2nd IEEE International Conference on Artificial Intelligence Circuits and Systems, 2020

2019

Learning Algorithms and Signal Processing for Brain-Inspired Computing [From the Guest Editors].

[BibT_eX]

[DOI]

Osvaldo Simeone

André Grüning

Mike Davies

Sophie Denève

Guang-Bin Huang

IEEE Signal Process. Mag., 2019

Low-Power Neuromorphic Hardware for Signal Processing Applications: A review of architectural and system-level design approaches.

[BibT_eX]

[DOI]

IEEE Signal Process. Mag., 2019

Deep learning acceleration based on in-memory computing.

[BibT_eX]

[DOI]

IBM J. Res. Dev., 2019

5 Parallel Prism: A topology for pipelined implementations of convolutional neural networks using computational memory.

[BibT_eX]

[DOI]

CoRR, 2019

Accurate deep neural network inference using computational phase-change memory.

[BibT_eX]

[DOI]

CoRR, 2019

Supervised Learning in Spiking Neural Networks with Phase-Change Memory Synapses.

[BibT_eX]

[DOI]

S. R. Nandakumar

Irem Boybat

CoRR, 2019

Low-Power Neuromorphic Hardware for Signal Processing Applications.

[BibT_eX]

[DOI]

CoRR, 2019

Computational memory-based inference and training of deep neural networks.

[BibT_eX]

[DOI]

Vinay Joshi

Geethan Karunaratne

Benedikt Kersting

S. R. Nandakumar

Anastasios Petropoulos

Christophe Piveteau

Proceedings of the 2019 Symposium on VLSI Circuits, Kyoto, Japan, June 9-14, 2019, 2019

Multi-ReRAM Synapses for Artificial Neural Network Training.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Symposium on Circuits and Systems, 2019

Phase-Change Memory Models for Deep Learning Training and Inference.

[BibT_eX]

[DOI]

Proceedings of the 26th IEEE International Conference on Electronics, Circuits and Systems, 2019

Phase-change memory enables energy-efficient brain-inspired computing.

[BibT_eX]

[DOI]

Proceedings of the Device Research Conference, 2019

2018

In-Memory Computing: Towards Energy-Efficient Artificial Intelligence.

[BibT_eX]

[DOI]

ERCIM News, 2018

Deep Networks Incorporating Spiking Neural Dynamics.

[BibT_eX]

[DOI]

CoRR, 2018

Impact of conductance drift on multi-PCM synaptic architectures.

[BibT_eX]

[DOI]

Proceedings of the Non-Volatile Memory Technology Symposium, 2018

Mixed-precision architecture based on computational memory for training deep neural networks.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Symposium on Circuits and Systems, 2018

Online Feature Learning from a non-i.i.d. Stream in a Neuromorphic System with Synaptic Competition.

[BibT_eX]

[DOI]

Proceedings of the 2018 International Joint Conference on Neural Networks, 2018

Spiking Neural Networks Enable Two-Dimensional Neurons and Unsupervised Multi-Timescale Learning.

[BibT_eX]

[DOI]

Timoleon Moraitis

Proceedings of the 2018 International Joint Conference on Neural Networks, 2018

"In-memory Computing": Accelerating AI Applications.

[BibT_eX]

[DOI]

Proceedings of the 48th European Solid-State Device Research Conference, 2018

2017

Neuromorphic Architecture With 1M Memristive Synapses for Detection of Weakly Correlated Inputs.

[BibT_eX]

[DOI]

IEEE Trans. Circuits Syst. II Express Briefs, 2017

Mixed-precision training of deep neural networks using computational memory.

[BibT_eX]

[DOI]

CoRR, 2017

Neuromorphic computing with multi-memristive synapses.

[BibT_eX]

[DOI]

CoRR, 2017

Temporal correlation detection using computational phase-change memory.

[BibT_eX]

[DOI]

CoRR, 2017

Mixed-Precision Memcomputing.

[BibT_eX]

[DOI]

CoRR, 2017

An efficient synaptic architecture for artificial neural networks.

[BibT_eX]

[DOI]

Proceedings of the 17th Non-Volatile Memory Technology Symposium, 2017

Neuromorphic system with phase-change synapses for pattern learning and feature extraction.

[BibT_eX]

[DOI]

Proceedings of the 2017 International Joint Conference on Neural Networks, 2017

Fatiguing STDP: Learning from spike-timing codes in the presence of rate codes.

[BibT_eX]

[DOI]

Proceedings of the 2017 International Joint Conference on Neural Networks, 2017

Feature Learning Using Synaptic Competition in a Dynamically-Sized Neuromorphic Architecture.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Conference on Rebooting Computing, 2017

Unsupervised Learning Using Phase-Change Synapses and Complementary Patterns.

[BibT_eX]

[DOI]

Proceedings of the Artificial Neural Networks and Machine Learning - ICANN 2017, 2017

2016

Recent Progress in Phase-Change Memory Technology.

[BibT_eX]

[DOI]

Chung Hon Lam

IEEE J. Emerg. Sel. Topics Circuits Syst., 2016

Multilevel-Cell Phase-Change Memory: A Viable Technology.

[BibT_eX]

[DOI]

Milos Stanisavljevic

IEEE J. Emerg. Sel. Topics Circuits Syst., 2016

High-Density Data Storage in Phase-Change Memory.

[BibT_eX]

[DOI]

ERCIM News, 2016

Learning spatio-temporal patterns in the presence of input noise using phase-change memristors.

[BibT_eX]

[DOI]

Tomas Tuma

Proceedings of the IEEE International Symposium on Circuits and Systems, 2016

Controller architecture for low-latency access to phase-change memory in OpenPOWER systems.

[BibT_eX]

[DOI]

Proceedings of the 26th International Conference on Field Programmable Logic and Applications, 2016

Inherent stochasticity in phase-change memory devices.

[BibT_eX]

[DOI]

Proceedings of the 46th European Solid-State Device Research Conference, 2016

2015

Enhancing the Reliability of MLC NAND Flash Memory Systems by Read Channel Optimization.

[BibT_eX]

[DOI]

ACM Trans. Design Autom. Electr. Syst., 2015

Phase-change memory: Feasibility of reliable multilevel-cell storage and retention at elevated temperatures.

[BibT_eX]

[DOI]

Milos Stanisavljevic

Proceedings of the IEEE International Reliability Physics Symposium, 2015

A collective relaxation model for resistance drift in phase change memory cells.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Reliability Physics Symposium, 2015

Seamlessly integrating disk and tape in a multi-tiered distributed file system.

[BibT_eX]

[DOI]

Ioannis Koltsidas

Slavisa Sarafijanovic

Proceedings of the 31st IEEE International Conference on Data Engineering, 2015

Non-resistance metric based read scheme for multi-level PCRAM in 25 nm technology.

[BibT_eX]

[DOI]

Haris Pozidis

Proceedings of the 2015 IEEE Custom Integrated Circuits Conference, 2015

2014

Using adaptive read voltage thresholds to enhance the reliability of MLC NAND flash memory systems.

[BibT_eX]

[DOI]

Proceedings of the Great Lakes Symposium on VLSI 2014, GLSVLSI '14, Houston, TX, USA - May 21, 2014

A 6-bit drift-resilient readout scheme for multi-level Phase-Change Memory.

[BibT_eX]

[DOI]

Proceedings of the IEEE Asian Solid-State Circuits Conference, 2014

2013

A 256-Mcell Phase-Change Memory Chip Operating at 2+ Bit/Cell.

[BibT_eX]

[DOI]

IEEE Trans. Circuits Syst. I Regul. Pap., 2013

A versatile platform for characterization of solid-state memory channels.

[BibT_eX]

[DOI]

Urs Egger

Aspa Palli

Proceedings of the 18th International Conference on Digital Signal Processing, 2013

Nonvolatile resistive memory devices based on hydrogenated amorphous carbon.

[BibT_eX]

[DOI]

Laurent Dellmann

Claudia A. Santini

Wabe W. Koelmans

Christophe Rossel

Proceedings of the European Solid-State Device Research Conference, 2013

2012

Nanopositioning for storage applications.

[BibT_eX]

[DOI]

Annu. Rev. Control., 2012

2011

Disk Scrubbing Versus Intradisk Redundancy for RAID Storage Systems.

[BibT_eX]

[DOI]

Ilias Iliadis

ACM Trans. Storage, 2011

Container Marking: Combining Data Placement, Garbage Collection and Wear Levelling for Flash.

[BibT_eX]

[DOI]

Proceedings of the MASCOTS 2011, 2011

Programming algorithms for multilevel phase-change memory.

[BibT_eX]

[DOI]

Matthew J. Breitwisch

Chung Hon Lam

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2011), 2011

2010

Channel Modeling and Signal Processing for Probe Storage Channels.

[BibT_eX]

[DOI]

IEEE J. Sel. Areas Commun., 2010

Adaptive noise-predictive maximum-likelihood (NPML) data detection for magnetic tape storage systems.

[BibT_eX]

[DOI]

Robert A. Hutchins

IBM J. Res. Dev., 2010

Magnetic Tape Storage and the Growth of Archival Data.

[BibT_eX]

[DOI]

Jens Jelitto

Mark A. Lantz

ERCIM News, 2010

Trends in Storage Technologies.

[BibT_eX]

[DOI]

IEEE Data Eng. Bull., 2010

Multilevel phase-change memory.

[BibT_eX]

[DOI]

Aggeliki Pantazi

Matthew J. Breitwisch

Chung Hon Lam

Proceedings of the 17th IEEE International Conference on Electronics, 2010

2009

Write amplification analysis in flash-based solid state drives.

[BibT_eX]

[DOI]

Ilias Iliadis

Roman A. Pletka

Proceedings of of SYSTOR 2009: The Israeli Experimental Systems Conference 2009, 2009

Compensation of PLL Loop Delay in Read Channels for Tape Storage Systems.

[BibT_eX]

[DOI]

Robert A. Hutchins

Proceedings of the Global Communications Conference, 2009. GLOBECOM 2009, Honolulu, Hawaii, USA, 30 November, 2009

Frame Synchronization for PPM-Encoded Longitudinal Position Words in Magnetic Tape Storage.

[BibT_eX]

[DOI]

Jens Jelitto

Proceedings of the Global Communications Conference, 2009. GLOBECOM 2009, Honolulu, Hawaii, USA, 30 November, 2009

High-speed intermittent-contact mode scanning probe microscopy using cantilevers with integrated electrostatic actuator and thermoelectric sensor.

[BibT_eX]

[DOI]

Proceedings of the American Control Conference, 2009

2008

A new intra-disk redundancy scheme for high-reliability RAID storage systems in the presence of unrecoverable errors.

[BibT_eX]

[DOI]

ACM Trans. Storage, 2008

Probe-based ultrahigh-density storage technology.

[BibT_eX]

[DOI]

IBM J. Res. Dev., 2008

Scaling tape-recording areal densities to 100 Gb/in2.

[BibT_eX]

[DOI]

Pierre-Olivier Jubert

Mark A. Lantz

Gary M. McClelland

Chandrasekhar Narayanaswami

Paul J. Seger

IBM J. Res. Dev., 2008

Disk scrubbing versus intra-disk redundancy for high-reliability raid storage systems.

[BibT_eX]

[DOI]

Ilias Iliadis

Proceedings of the 2008 ACM SIGMETRICS International Conference on Measurement and Modeling of Computer Systems, 2008

Reverse Concatenation of Product and Modulation Codes.

[BibT_eX]

[DOI]

Proceedings of IEEE International Conference on Communications, 2008

On intermittent-contact mode sensing using electrostatically-actuated micro-cantilevers with integrated thermal sensors.

[BibT_eX]

[DOI]

Proceedings of the American Control Conference, 2008

2007

Control of MEMS-Based Scanning-Probe Data-Storage Devices.

[BibT_eX]

[DOI]

IEEE Trans. Control. Syst. Technol., 2007

A Survey of Control Issues in Nanopositioning.

[BibT_eX]

[DOI]

Santosh Devasia

S. O. Reza Moheimani

IEEE Trans. Control. Syst. Technol., 2007

Modeling, Design, and Verification for the Analog Front-End of a MEMS-Based Parallel Scanning-Probe Storage Device.

[BibT_eX]

[DOI]

IEEE J. Solid State Circuits, 2007

Enumerative Encoding with Non-Uniform Modulation Constraints.

[BibT_eX]

[DOI]

Mario Blaum

Proceedings of the IEEE International Symposium on Information Theory, 2007

2006

Analysis of a new intra-disk redundancy scheme for high-reliability RAID storage systems in the presence of unrecoverable errors.

[BibT_eX]

[DOI]

Proceedings of the Joint International Conference on Measurement and Modeling of Computer Systems, 2006

2005

Regular and irregular progressive edge-growth tanner graphs.

[BibT_eX]

[DOI]

IEEE Trans. Inf. Theory, 2005

Reduced-Complexity Decoding of LDPC Codes.

[BibT_eX]

[DOI]

Jinghu Chen

Sundararajan Sankaranarayanan

IEEE Trans. Commun., 2005

Performance of product codes on channels with memory.

[BibT_eX]

[DOI]

Proceedings of the 2005 IEEE International Symposium on Information Theory, 2005

Signal processing for probe storage.

[BibT_eX]

[DOI]

Peter Bächtold

Christoph Hagleitner

Aggeliki Pantazi

Proceedings of the 2005 IEEE International Conference on Acoustics, 2005

Two-sensor-based H∞ control for nanopositioning in probe storage.

[BibT_eX]

[DOI]

Haralambos Pozidis

Proceedings of the 44th IEEE IEEE Conference on Decision and Control and 8th European Control Conference Control, 2005

Nanopositioning for probe storage.

[BibT_eX]

[DOI]

Mark A. Lantz

Proceedings of the American Control Conference, 2005

2004

Application of capacity approaching coding techniques to digital subscriber lines.

[BibT_eX]

[DOI]

Hamid R. Sadjadpour

IEEE Commun. Mag., 2004

Capacity-approaching codes: can they be applied to the magnetic recording channel?

[BibT_eX]

[DOI]

IEEE Commun. Mag., 2004

Approximate algorithms for computing the minimum distance of low-density parity-check codes.

[BibT_eX]

[DOI]

Proceedings of the 2004 IEEE International Symposium on Information Theory, 2004

On the computation of the minimum distance of low-density parity-check codes.

[BibT_eX]

[DOI]

Proceedings of IEEE International Conference on Communications, 2004

Binary representation of cycle Tanner-graph GF(2<sup>b</sup>) codes.

[BibT_eX]

[DOI]

Proceedings of IEEE International Conference on Communications, 2004

Codes satisfying maximum transition run and parity-check constraints.

[BibT_eX]

[DOI]

Proceedings of IEEE International Conference on Communications, 2004

2003

A Nanotechnology-based Approach to Data Storage.

[BibT_eX]

[DOI]

Proceedings of 29th International Conference on Very Large Data Bases, 2003

2002

Filtered multitone modulation for very high-speed digital subscriber lines.

[BibT_eX]

[DOI]

IEEE J. Sel. Areas Commun., 2002

Low-density parity-check codes for digital subscriber lines.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Conference on Communications, 2002

Computing information rates of magnetic recording channels in the presence of medium noise.

[BibT_eX]

[DOI]

Proceedings of the Global Telecommunications Conference, 2002

2001

Guest editorial the turbo principle: from theory to practice.

[BibT_eX]

[DOI]

Paul H. Siegel

Dariush Divsalar

Joachim Hagenauer

Douglas N. Rowitch

William H. Tranter

IEEE J. Sel. Areas Commun., 2001

Guest editorial - the turbo principle: from theory to practice II.

[BibT_eX]

[DOI]

Paul H. Siegel

Dariush Divsalar

Joachim Hagenauer

Douglas N. Rowitch

IEEE J. Sel. Areas Commun., 2001

Maximum transition run codes for generalized partial response channels.

[BibT_eX]

[DOI]

Brian H. Marcus

Dharmendra S. Modha

IEEE J. Sel. Areas Commun., 2001

Performance analysis of magnetic recording systems.

[BibT_eX]

[DOI]

Stefano Tomasin

Proceedings of the IEEE International Conference on Communications, 2001

Application of high-rate tail-biting codes to generalized partial response channels.

[BibT_eX]

[DOI]

Michael Tüchler

Christian Weiss

Joachim Hagenauer

Proceedings of the Global Telecommunications Conference, 2001

Efficient implementations of the sum-product algorithm for decoding LDPC codes.

[BibT_eX]

[DOI]

Proceedings of the Global Telecommunications Conference, 2001

Progressive edge-growth Tanner graphs.

[BibT_eX]

[DOI]

Proceedings of the Global Telecommunications Conference, 2001

2000

Filter bank modulation techniques for very high-speed digital subscriber lines.

[BibT_eX]

[DOI]

John M. Cioffi

IEEE Commun. Mag., 2000

1997

Concatenated Reed-Solomon/convolutional coding for data transmission in CDMA-based cellular systems.

[BibT_eX]

[DOI]

Marcel Rupf

IEEE Trans. Commun., 1997

1994

Concatenated Reed-Solomon/convolutional coding scheme for data transmission in CDMA cellular systems.

[BibT_eX]

[DOI]

Proceedings of 44th IEEE Vehicular Technology Conference: Creating Tomorrow's Mobile Systems, 1994

Concatenated Coding Scheme for Reliable Data Transmission in CDMA Cellular Systems.

[BibT_eX]

[DOI]

Proceedings of the Mobile Communications: Advanced Systems and Components, 1994

1991

On codes satisfying M th-order running digital sum constraints.

[BibT_eX]

[DOI]

IEEE Trans. Inf. Theory, 1991

1989

Decoding of trellis-encoded signals in the presence of intersymbol interference and noise.

[BibT_eX]

[DOI]

Pierre R. Chevillat

IEEE Trans. Commun., 1989

1987

Adaptive Equalization Techniques for HF Channels.

[BibT_eX]

[DOI]

IEEE J. Sel. Areas Commun., 1987

1986

Tracking properties and steady-state performance of RLS adaptive filter algorithms.

[BibT_eX]

[DOI]

IEEE Trans. Acoust. Speech Signal Process., 1986

1985

Comparison of DFE and MLSE Receiver Performance on HF Channels.

[BibT_eX]

[DOI]

Asrar U. H. Sheikh

M. Tobis

IEEE Trans. Commun., 1985

Steady-state behavior of RLS adaptive algorithms.

[BibT_eX]

[DOI]