Archit Joshi

According to our database, Archit Joshi authored at least 10 papers between 2008 and 2026.

Collaborative distances:

• Dijkstra number of six.
• Erdős number of five.

2026

Hybrid Selective Harmonic Elimination for Direct AC/AC SST.

Archit Joshi, Shabari Nath

IEEE Trans. Circuits Syst. I Regul. Pap., January, 2026

2025

VERITAS: Verification and Explanation of Realness in Images for Transparency in AI Systems.

Aadi Srivastava, Vignesh Natarajkumar, Utkarsh Bheemanaboyna, Devisree Akashapu, Nagraj Gaonkar, Archit Joshi

CoRR, July, 2025

Nonlinearity Analysis of Down-Sampled Paths in High-Speed ADC-Based SerDes Receivers.

Archit Joshi

IEEE Access, 2025

2024

Data Path Nonlinearity Estimation for 200 Gbps PAM4 Serdes Receivers.

Archit Joshi

IEEE Access, 2024

2019

A Low-Pass Filter Bandwidth Adaptation Technique for Phase Interpolators.

Archit Joshi, Mukul Sarkar

IEEE Trans. Very Large Scale Integr. Syst., 2019

An Odd Phase CDR With Phase Interpolator Trimming.

Archit Joshi, Mukul Sarkar

IEEE Trans. Circuits Syst. II Express Briefs, 2019

2017

Nonlinearity Estimation for Compensation of Phase Interpolator in Bang-Bang CDRs.

Archit Joshi, Mukul Sarkar

IEEE Trans. Very Large Scale Integr. Syst., 2017

2016

Bandwidth Compensation Technique for Digital PLL.

Archit Joshi, Gagan Midha

IEEE Trans. Circuits Syst. II Express Briefs, 2016

2015

Period Jitter of Frequency-Locked Loops.

Archit Joshi

IEEE Trans. Very Large Scale Integr. Syst., 2015

2008

Analysis of Bang-bang CDR circuits with equations of linear motion.

Archit Joshi

Proceedings of the 15th IEEE International Conference on Electronics, Circuits and Systems, 2008