Arthur D. Friedman

Affiliations:
  • University of Southern California, Los Angeles, USA


According to our database1, Arthur D. Friedman authored at least 37 papers between 1966 and 1999.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of two.

Awards

IEEE Fellow

IEEE Fellow 1984, "For contributions to fault-tolerant computing and switching theory and to computer engineering education.".

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
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Links

Online presence:

On csauthors.net:

Bibliography

1999
Legal and Technical Responses to Protecting the U. S. Critical Infrastructures (Panel).
Proceedings of the 15th Annual Computer Security Applications Conference (ACSAC 1999), 1999

1994
A Functional Approach to Efficient Fault Detection in Iterative Logic Arrays.
IEEE Trans. Computers, 1994

1990
Digital systems testing and testable design.
Computer Science Press, ISBN: 978-0-7167-8179-0, 1990

1984
Tradeoffs in system level diagnosis of multiprocessor systems.
Proceedings of the American Federation of Information Processing Societies: 1984 National Computer Conference, 1984

1981
A Survey of the State of the Art of Design Automation.
Computer, 1981

1980
Design of Self-Diagnosable Multiprocessor Systems with Concurrent Computation and Diagnosis.
IEEE Trans. Computers, 1980

Functional Level Primitives in Test Generation.
IEEE Trans. Computers, 1980

System-Level Fault Diagnosis.
Computer, 1980

Different Diagnostic Models for Multiprocessor Systems.
Proceedings of the Information Processing, Proceedings of the 8th IFIP Congress 1980, Tokyo, Japan - October 6-9, 1980 and Melbourne, Australia, 1980

1979
Analysis of Digital Systems Using a New Measure of System Diagnosis.
IEEE Trans. Computers, 1979

1978
Efficient Design of Self-Checking Checker for any <i>m</i>-Out-of-<i>n</i> Code.
IEEE Trans. Computers, 1978

Some New Types of Logical Completeness.
IEEE Trans. Computers, 1978

The Effect of LSI Technology on the Theory of Modular Computer Design.
Computer, 1978

A survey and methodology of reconfigurable multi-module systems.
Proceedings of the IEEE Computer Society's Second International Computer Software and Applications Conference, 1978

Incomplete Fault Coverage In Modular Miltiprocessor Systems.
Proceedings of the Proceedings 1978 ACM Annual Conference, 1978

Diagnostic And Computational Reconfiguration In Multiprocessor Systems.
Proceedings of the Proceedings 1978 ACM Annual Conference, 1978

1974
Test Point Placement to Simplify Fault Detection.
IEEE Trans. Computers, 1974

Diagnosis of Short-Circuit Faults in Combinational Circuits.
IEEE Trans. Computers, 1974

Initial design concepts for an advanced design automation system.
Proceedings of the 11th Design Automation Workshop, 1974

1973
Restricted Checking Sequences for Sequential Machines.
IEEE Trans. Computers, 1973

Easily Testable Iterative Systems.
IEEE Trans. Computers, 1973

1972
Comments on "Design of Diagnosable Iterative Arrays".
IEEE Trans. Computers, 1972

1971
Fault Detection in Iterative Logic Arrays.
IEEE Trans. Computers, 1971

Systems of Asynchronously Operating Modules.
IEEE Trans. Computers, 1971

1970
R70-17 Asynchronous Sequential Circuits with Feedback.
IEEE Trans. Computers, 1970

1969
Design of Generalized Double Rank and Multiple Rank Sequential Circuits
Inf. Control., November, 1969

Structural Simplification and Decomposition of Asynchronous Sequential Circuits.
IEEE Trans. Computers, 1969

Universal Single Transition Time Asynchronous State Assignments.
IEEE Trans. Computers, 1969

Design of Asynchronous Circuits Assuming Unbounded Gate Delays.
IEEE Trans. Computers, 1969

1968
Synthesis of Asynchronous Sequential Circuits with Multiple-Input Changes.
IEEE Trans. Computers, 1968

Realization of Asynchronous Sequential Circuits Without Inserted Delay Elements.
IEEE Trans. Computers, 1968

1967
Comment on "A method for the selection of prime implicants".
IEEE Trans. Electron. Comput., 1967

Fault Detection in Redundant Circuits.
IEEE Trans. Electron. Comput., 1967

Universal Single Transition Time Asynchronous State Assignments
Proceedings of the 8th Annual Symposium on Switching and Automata Theory, 1967

Synthesis of Asynchronous Sequential Circuits with Minimum Number of Delay Elements
Proceedings of the 8th Annual Symposium on Switching and Automata Theory, 1967

1966
Feedback in Asynchronous Sequential Circuits.
IEEE Trans. Electron. Comput., 1966

Feedback in Synchronous Sequential Switching Circuits.
IEEE Trans. Electron. Comput., 1966


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