Arthur Silitonga

According to our database, Arthur Silitonga authored at least 4 papers between 2018 and 2021.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2021

Fast Resource and Timing Aware Design Optimisation for High-Level Synthesis.

André B. Perina, Arthur Silitonga, Jürgen Becker, Vanderlei Bonato

IEEE Trans. Computers, 2021

2019

Reconfigurable Module of Multi-mode AES Cryptographic Algorithms for AP SoCs.

Arthur Silitonga, Zhou Jiang, Nadir Khan, Jürgen Becker

Proceedings of the 2019 IEEE Nordic Circuits and Systems Conference, 2019

Secure Local Configuration of Intellectual Property Without a Trusted Third Party.

Nadir Khan, Arthur Silitonga, Brian Pachideh, Sven Nitzsche, Jürgen Becker

Proceedings of the Applied Reconfigurable Computing - 15th International Symposium, 2019

2018

HLS-Based Performance and Resource Optimization of Cryptographic Modules.

Arthur Silitonga, Florian Schade, Guanru Jiang, Jürgen Becker

Proceedings of the IEEE International Conference on Parallel & Distributed Processing with Applications, 2018