Arun Rangasamy

According to our database, Arun Rangasamy authored at least 4 papers between 2008 and 2026.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2026

Hexagon-MLIR: An AI Compilation Stack For Qualcomm's Neural Processing Units (NPUs).

Mohammed Javed Absar, Muthu Baskaran, Abhikrant Sharma, Abhilash Bhandari, Ankit Aggarwal, Arun Rangasamy, Dibyendu Das, Fateme Hosseini, Franck Slama, Iulian Brumar, Jyotsna Verma, Krishnaprasad Bindumadhavan, Mitesh Kothari, Mohit Gupta, Ravishankar Kolachana, Richard Lethin, Samarth Narang, Sanjay Motilal Ladwa, Shalini Jain, Snigdha Suresh Dalvi, Tasmia Rahman, Venkat Rasagna Reddy Komatireddy, Vivek Vasudevbhai Pandya, Xiyue Shi, Zachary Zipper

CoRR, February, 2026

2011

Petri net based performance modeling for effective DVFS for multithreaded programs.

Arun Rangasamy, Y. N. Srikant

Proceedings of the 2011 ACM Symposium on Applied Computing (SAC), TaiChung, Taiwan, March 21, 2011

Evaluation of dynamic voltage and frequency scaling for stream programs.

Arun Rangasamy, Y. N. Srikant

Proceedings of the 8th Conference on Computing Frontiers, 2011

2008

Compiler-directed frequency and voltage scaling for a multiple clock domain microarchitecture.

Arun Rangasamy, Rahul Nagpal, Y. N. Srikant

Proceedings of the 5th Conference on Computing Frontiers, 2008