Arvin Park

According to our database1, Arvin Park authored at least 21 papers between 1987 and 1993.

Collaborative distances:
  • Dijkstra number2 of two.
  • Erdős number3 of three.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Other 

Links

On csauthors.net:

Bibliography

1993
An Analysis of the Information Content of Address and Data Reference Streams.
Proceedings of the 1993 ACM SIGMETRICS conference on Measurement and modeling of computer systems, 1993

1992
Codes to reduce switching transients across VLSI I/O pins.
SIGARCH Comput. Archit. News, 1992

Work-Optimal Asynchronous Algorithms for Shared Memory Parallel Computers.
SIAM J. Comput., 1992

Modifying VM hardware to reduce address pin requirements.
Proceedings of the 25th Annual International Symposium on Microarchitecture, 1992

A partitioned translation lookaside buffer approach to reducing address bandwith.
Proceedings of the 19th Annual International Symposium on Computer Architecture. Gold Coast, 1992

CCHIME: A Cache Coherent Hybrid Interconnected Memory Extension.
Proceedings of the 6th International Parallel Processing Symposium, 1992

1991
Using color-image maps to study collisions in the three-body problem.
Vis. Comput., 1991

Analysis of the Paging Behavior of UNIX.
SIGMETRICS Perform. Evaluation Rev., 1991

Measurements of the Paging Behavior of UNIX.
Proceedings of the 1991 ACM SIGMETRICS conference on Measurement and modeling of computer systems, 1991

Workload and Implementation Considerations for Dynamic Base Register Caching.
Proceedings of the 24th Annual IEEE/ACM International Symposium on Microarchitecture, 1991

An Analysis of the Information Content of Address Reference Streams.
Proceedings of the 24th Annual IEEE/ACM International Symposium on Microarchitecture, 1991

Dynamic Base Register Caching: A Technique for Reducing Address Bus Width.
Proceedings of the 18th Annual International Symposium on Computer Architecture. Toronto, 1991

General Asynchrony Is Not Expensive for PRAMs.
Proceedings of the Fifth International Parallel Processing Symposium, Proceedings, Anaheim, California, USA, April 30, 1991

1990
IOStone: a synthetic file system benchmark.
SIGARCH Comput. Archit. News, 1990

Reducing Communication Costs for Sorting on Mesh-Connected and Linearly Connected Parallel Computers.
J. Parallel Distributed Comput., 1990

The Processor Identity Problem.
Inf. Process. Lett., 1990

Address compression through base register caching.
Proceedings of the 23rd Annual Workshop and Symposium on Microprogramming and Microarchitecture, 1990

Asynchronous PRAMs Are (Almost) as Good as Synchronous PRAMs
Proceedings of the 31st Annual Symposium on Foundations of Computer Science, 1990

1989
Array Access Bounds for Block Storage Memory Systems.
IEEE Trans. Computers, 1989

1987
Performance Through Memory.
Proceedings of the 1987 ACM SIGMETRICS conference on Measurement and modeling of computer systems, 1987

Improved sorting algorithms for parallel computers.
Proceedings of the 15th ACM Annual Conference on Computer Science, 1987


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