Ashok Kumar Suhag

According to our database, Ashok Kumar Suhag authored at least 7 papers between 2011 and 2023.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2023

Designing of Energy-Efficient Approximate Multiplier Circuit for Processing Unit of IoT Devices.

Pooja Choudhary, Lava Bhargava, Ashok Kumar Suhag

SN Comput. Sci., September, 2023

Optimization of Imprecise Multiplier Circuits by using Binary Decision Diagram.

Pooja Choudhary, Lava Bhargava, G. U. Vinod, Ashok Kumar Suhag, Masahiro Fujita, Virendra Singh

Proceedings of the IEEE International Symposium on Smart Electronic Systems, 2023

2022

Approximating Arithmetic Circuits for IoT Devices Data Processing.

Pooja Choudhary, Lava Bhargava, Masahiro Fujita, Virendra Singh, Ashok Kumar Suhag

Comput. Ind. Eng., 2022

2020

Leveraging controllability measures for high transition delay test coverage in DTESFF based partial enhanced scan design.

Vivek Shrivastava, Ashok Kumar Suhag

Int. J. Syst. Assur. Eng. Manag., 2020

2013

Flip-flop selection for partial enhance scan chain using DTESFF for high transition delay fault coverage.

Ashok Kumar Suhag, Vivek Shrivastava, Nidhi Singh

Int. J. Syst. Assur. Eng. Manag., 2013

2012

Performance evaluation of delay testable enhanced scan flip-flop.

Ashok Kumar Suhag, Vivek Shrivastava

Int. J. Syst. Assur. Eng. Manag., 2012

2011

Delay Testable Enhanced Scan Flip-Flop: DFT for High Fault Coverage.

Ashok Kumar Suhag, Vivek Shrivastava

Proceedings of the International Symposium on Electronic System Design, 2011