Atsuro Kobayashi

According to our database1, Atsuro Kobayashi authored at least 3 papers between 2015 and 2017.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of five.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
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Links

On csauthors.net:

Bibliography

2017
12× bit-error acceptable, 300× extended data-retention time, value-aware SSD with vertical 3D-TLC NAND flash memories for image recognition.
Proceedings of the 2017 IEEE Custom Integrated Circuits Conference, 2017

2016
Versatile TLC NAND flash memory control to reduce read disturb errors by 85% and extend read cycles by 6.7-times of Read-Hot and Cold data for cloud data centers.
Proceedings of the 2016 IEEE Symposium on VLSI Circuits, 2016

2015
7.7 Enterprise-grade 6x fast read and 5x highly reliable SSD with TLC NAND-flash memory for big-data storage.
Proceedings of the 2015 IEEE International Solid-State Circuits Conference, 2015


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