Audrey C. Therrien
Orcid: 0000-0001-6698-8400
According to our database1,
Audrey C. Therrien authored at least 8 papers
between 2023 and 2026.
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Bibliography
2026
wa-hls4ml: A Benchmark and Surrogate Models for hls4ml Resource and Latency Estimation.
ACM Trans. Reconfigurable Technol. Syst., June, 2026
2025
Neural Network Acceleration on MPSoC board: Integrating SLAC's SNL, Rogue Software and Auto-SNL.
CoRR, August, 2025
rule4ml: an open-source tool for resource utilization and latency estimation for ML models on FPGA.
Mach. Learn. Sci. Technol., 2025
Proceedings of the ICT Systems Security and Privacy Protection, 2025
wa-hls4ml and lui-gnn: A Benchmark and GNN based Surrogate Model for hls4ml Resource and Latency Estimation.
Proceedings of the 2025 ACM/SIGDA International Symposium on Field Programmable Gate Arrays, 2025
2024
Accelerating data acquisition with FPGA-based edge machine learning: a case study with LCLS-II.
Mach. Learn. Sci. Technol., 2024
2023
Exploring machine learning to hardware implementations for large data rate x-ray instrumentation.
Mach. Learn. Sci. Technol., December, 2023
Proceedings of the IEEE Biomedical Circuits and Systems Conference, 2023