Aurelio Morales-Villanueva

Orcid: 0000-0002-5469-4912

According to our database1, Aurelio Morales-Villanueva authored at least 5 papers between 2013 and 2024.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
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Links

On csauthors.net:

Bibliography

2024
Uncertainty Evaluation of a Gas Turbine Model Based on a Nonlinear Autoregressive Exogenous Model and Monte Carlo Dropout.
Sensors, January, 2024

2016
Configuration prefetching and reuse for preemptive hardware multitasking on partially reconfigurable FPGAs.
Proceedings of the 2016 Design, Automation & Test in Europe Conference & Exhibition, 2016

2015
Partial Region and Bitstream Cost Models for Hardware Multitasking on Partially Reconfigurable FPGAs.
Proceedings of the 2015 IEEE International Parallel and Distributed Processing Symposium Workshop, 2015

2013
On-chip Context Save and Restore of Hardware Tasks on Partially Reconfigurable FPGAs.
Proceedings of the 21st IEEE Annual International Symposium on Field-Programmable Custom Computing Machines, 2013

HTR: On-Chip Hardware Task Relocation for Partially Reconfigurable FPGAs.
Proceedings of the Reconfigurable Computing: Architectures, Tools and Applications, 2013


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