Bartosz Dec

According to our database, Bartosz Dec authored at least 2 papers between 2018 and 2024.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of five.

2024

Study of Storage Capacity of Charge Trap EAROM NAND Memory Designed for Integration with VeSTIC Technology.

Bartosz Dec, Andrzej Pfitzner

Proceedings of the 31st International Conference on Mixed Design of Integrated Circuits and System , 2024

2018

Feasibility Studies of EEPROM Memory Implementations in VeSTIC Technology.

Bartosz Dec, Andrzej Pfitzner

Proceedings of the 25th International Conference "Mixed Design of Integrated Circuits and System", 2018