Bharath Kumar Thandri

According to our database1, Bharath Kumar Thandri authored at least 7 papers between 2001 and 2015.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

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PhD thesis 
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Links

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Bibliography

2015
Derivative-free active-RC elliptic filter using cascade of biquads in 28 nm CMOS.
Proceedings of the IEEE 58th International Midwest Symposium on Circuits and Systems, 2015

2007
A 63 dB SNR, 75-mW Bandpass RF ΣΔ ADC at 950 MHz Using 3.8-GHz Clock in 0.25-µm SiGe BiCMOS Technology.
IEEE J. Solid State Circuits, 2007

2006
A 92-MHz 13-bit IF digitizer using optimized SC integrators in 0.35-μm CMOS technology.
IEEE Trans. Circuits Syst. II Express Briefs, 2006

An overview of feed-forward design techniques for high-gain wideband operational transconductance amplifiers.
Microelectron. J., 2006

2003
A robust feedforward compensation scheme for multistage operational transconductance amplifiers with no Miller capacitors.
IEEE J. Solid State Circuits, 2003

A 92MHz, 80dB peak SNR SC bandpass ΣΔ modulator based on a high GBW OTA with no Miller capacitors in 0.35μm CMOS technology.
Proceedings of the IEEE Custom Integrated Circuits Conference, 2003

2001
A feedforward compensation scheme for high gain wideband amplifiers.
Proceedings of the 2001 8th IEEE International Conference on Electronics, 2001


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