José Silva-Martínez
Orcid: 0000-0002-7960-0177
According to our database1,
José Silva-Martínez
authored at least 162 papers
between 1993 and 2024.
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Bibliography
2024
Matrix-Based Digital Calibration Technique for High-Performance SAR and Pipeline ADCs.
IEEE Trans. Circuits Syst. I Regul. Pap., January, 2024
2023
IEEE Access, 2023
2022
An Interference-Tolerant Synchronization Scheme for Wireless Communication Systems Based on Direct Sequence Spread Spectrum.
IEEE Trans. Circuits Syst. I Regul. Pap., 2022
Proceedings of the IEEE International Symposium on Circuits and Systems, 2022
2021
IEEE Trans. Circuits Syst. II Express Briefs, 2021
Proceedings of the 43rd Annual International Conference of the IEEE Engineering in Medicine & Biology Society, 2021
2020
IEEE Trans. Instrum. Meas., 2020
IEEE Trans. Instrum. Meas., 2020
MWSCAS Guest Editorial Special Issue Based on the 62nd International Midwest Symposium on Circuits and Systems.
IEEE Trans. Circuits Syst., 2020
An Efficient Sinusoid-Like Pseudo Random Sequence Modulator/Demodulator System With Reduced Adjacent Channel Leakage and High Rejection to Random and Systematic Interference.
IEEE Trans. Circuits Syst., 2020
A 12-Bit 125-MS/s 2.5-Bit/Cycle SAR-Based Pipeline ADC Employing a Self-Biased Gain Boosting Amplifier.
IEEE Trans. Circuits Syst., 2020
IEEE J. Solid State Circuits, 2020
A Blind Calibration Scheme for Switched-Capacitor Pipeline Analog-to-Digital Converters.
Proceedings of the 11th IEEE Latin American Symposium on Circuits & Systems, 2020
A 3 to 6 GHz Highly Linear I-Channel Receiver with over +3.0 dBm In-Band P1dB and 200 MHz Baseband Bandwidth Suitable for 5G Wireless and Cognitive Radio Applications.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2020
2019
A 13-Bit 260MS/s Power-Efficient Pipeline ADC Using a Current-Reuse Technique and Interstage Gain and Nonlinearity Errors Calibration.
IEEE Trans. Circuits Syst. I Regul. Pap., 2019
A 27.7 fJ/conv-step 500 MS/s 12-Bit Pipelined ADC Employing a Sub-ADC Forecasting Technique and Low-Power Class AB Slew Boosted Amplifiers.
IEEE Trans. Circuits Syst. I Regul. Pap., 2019
A 3-6-GHz Highly Linear I-Channel Receiver With Over +3.0-dBm In-Band P<sub>1dB</sub> and 200-MHz Baseband Bandwidth Suitable for 5G Wireless and Cognitive Radio Applications.
IEEE Trans. Circuits Syst. I Regul. Pap., 2019
Proceedings of the 62nd IEEE International Midwest Symposium on Circuits and Systems, 2019
2018
A 128-Tap Highly Tunable CMOS IF Finite Impulse Response Filter for Pulsed Radar Applications.
IEEE Trans. Very Large Scale Integr. Syst., 2018
A Continuous-Time MASH 1-1-1 Delta-Sigma Modulator With FIR DAC and Encoder-Embedded Loop-Unrolling Quantizer in 40-nm CMOS.
IEEE Trans. Very Large Scale Integr. Syst., 2018
Operational Transconductance Amplifier With Class-B Slew-Rate Boosting for Fast High-Performance Switched-Capacitor Circuits.
IEEE Trans. Circuits Syst. I Regul. Pap., 2018
IEEE J. Solid State Circuits, 2018
Proceedings of the 2018 IEEE Custom Integrated Circuits Conference, 2018
2017
IEEE Trans. Circuits Syst. I Regul. Pap., 2017
IEEE Trans. Circuits Syst. II Express Briefs, 2017
Low-Power G<sub>m</sub>-C Filter Employing Current-Reuse Differential Difference Amplifiers.
IEEE Trans. Circuits Syst. II Express Briefs, 2017
A Low-Power Digitizer for Back-Illuminated 3-D-Stacked CMOS Image Sensor Readout With Passing Window and Double Auto-Zeroing Techniques.
IEEE J. Solid State Circuits, 2017
A 43-mW MASH 2-2 CT ΣΔ Modulator Attaining 74.4/75.8/76.8 dB of SNDR/SNR/DR and 50 MHz of BW in 40-nm CMOS.
IEEE J. Solid State Circuits, 2017
A 75-MHz Continuous-Time Sigma-Delta Modulator Employing a Broadband Low-Power Highly Efficient Common-Gate Summing Stage.
IEEE J. Solid State Circuits, 2017
Proceedings of the IEEE 60th International Midwest Symposium on Circuits and Systems, 2017
Proceedings of the IEEE 60th International Midwest Symposium on Circuits and Systems, 2017
High-performance continuous-time MASH sigma-delta ADCs for broadband wireless applications.
Proceedings of the IEEE 60th International Midwest Symposium on Circuits and Systems, 2017
Proceedings of the IEEE International Symposium on Circuits and Systems, 2017
2016
A 35 dBm Output Power and 38 dB Linear Gain PA With 44.9% Peak PAE at 1.9 GHz in 40 nm CMOS.
IEEE J. Solid State Circuits, 2016
A 4 Bit Continuous-Time ΣΔ Modulator With Fully Digital Quantization Noise Reduction Algorithm Employing a 7 Bit Quantizer.
IEEE J. Solid State Circuits, 2016
A digital-circuit-based evolutionary-computation algorithm for time-interleaved ADC background calibration.
Proceedings of the 29th IEEE International System-on-Chip Conference, 2016
2015
Efficient Broadband Current-Mode Adder- Quantizer Design for Continuous-Time Sigma-Delta Modulators.
IEEE Trans. Very Large Scale Integr. Syst., 2015
A Process-Variation Resilient Current Mode Logic With Simultaneous Regulations for Time Constant, Voltage Swing, Level Shifting, and DC Gain Using Time-Reference-Based Adaptive Biasing Chain.
IEEE Trans. Very Large Scale Integr. Syst., 2015
IEEE Trans. Very Large Scale Integr. Syst., 2015
A 75 MHz BW 68dB DR CT-ΣΔ modulator with single amplifier biquad filter and a broadband low-power common-gate summing technique.
Proceedings of the Symposium on VLSI Circuits, 2015
Proceedings of the 2015 IEEE International Symposium on Circuits and Systems, 2015
2014
General Analysis of Feedback DAC's Clock Jitter in Continuous-Time Sigma-Delta Modulators.
IEEE Trans. Circuits Syst. II Express Briefs, 2014
External Capacitor-Less Low Drop-Out Regulator With 25 dB Superior Power Supply Rejection in the 0.4-4 MHz Range.
IEEE J. Solid State Circuits, 2014
Proceedings of the IEEE 57th International Midwest Symposium on Circuits and Systems, 2014
Design techniques for external capacitor-less LDOs with high PSR over wide frequency range.
Proceedings of the IEEE 57th International Midwest Symposium on Circuits and Systems, 2014
Blocker tolerant wideband continuous time sigma-delta modulator for wireless applications.
Proceedings of the IEEE 57th International Midwest Symposium on Circuits and Systems, 2014
Proceedings of the IEEE 57th International Midwest Symposium on Circuits and Systems, 2014
Review of temperature sensors as monitors for RF-MMW built-in testing and self-calibration schemes.
Proceedings of the IEEE 57th International Midwest Symposium on Circuits and Systems, 2014
Proceedings of the IEEE Asian Solid-State Circuits Conference, 2014
2013
IEEE Trans. Very Large Scale Integr. Syst., 2013
A 1.5 ns OFF/ON Switching-Time Voltage-Mode LVDS Driver/Receiver Pair for Asynchronous AER Bit-Serial Chip Grid Links With Up to 40 Times Event-Rate Dependent Power Savings.
IEEE Trans. Biomed. Circuits Syst., 2013
Low-Power, Low-Cost CMOS Direct-Conversion Receiver Front-End for Multistandard Applications.
IEEE J. Solid State Circuits, 2013
Envelope tracking technique with bang-bang slew-rate enhancer for linear wideband RF PAs.
Proceedings of the IEEE 56th International Midwest Symposium on Circuits and Systems, 2013
Proceedings of the IEEE 56th International Midwest Symposium on Circuits and Systems, 2013
Robust compensation scheme for low power capacitor-less low dropout voltage regulator.
Proceedings of the IEEE 56th International Midwest Symposium on Circuits and Systems, 2013
An external capacitor-less low drop-out regulator with superior PSR and fast transient response.
Proceedings of the IEEE 56th International Midwest Symposium on Circuits and Systems, 2013
Proceedings of the 2013 IEEE International Symposium on Circuits and Systems (ISCAS2013), 2013
2012
IEEE Trans. Very Large Scale Integr. Syst., 2012
An LC Quadrature VCO Using Capacitive Source Degeneration Coupling to Eliminate Bi-Modal Oscillation.
IEEE Trans. Circuits Syst. I Regul. Pap., 2012
IEEE J. Solid State Circuits, 2012
IEEE J. Emerg. Sel. Topics Circuits Syst., 2012
Proceedings of the 55th IEEE International Midwest Symposium on Circuits and Systems, 2012
Low-power 3<sup>rd</sup>-order continuous-time low-pass sigma-delta analog-to-digital converter for wideband applications.
Proceedings of the 55th IEEE International Midwest Symposium on Circuits and Systems, 2012
2011
Electrothermal Design Procedure to Observe RF Circuit Power and Linearity Characteristics With a Homodyne Differential Temperature Sensor.
IEEE Trans. Circuits Syst. I Regul. Pap., 2011
Clock-Jitter-Tolerant Wideband Receivers: An Optimized Multichannel Filter-Bank Approach.
IEEE Trans. Circuits Syst. I Regul. Pap., 2011
Corrections to "A Sub-Nyquist Rate Sampling Receiver Exploiting Compressive Sensing".
IEEE Trans. Circuits Syst. I Regul. Pap., 2011
IEEE Trans. Circuits Syst. I Regul. Pap., 2011
A 0.8 ps DNL Time-to-Digital Converter With 250 MHz Event Rate in 65 nm CMOS for Time-Mode-Based Sigma Delta Modulator.
IEEE J. Solid State Circuits, 2011
A Continuous Time Multi-Bit Delta Sigma ADC Using Time Domain Quantizer and Feedback Element.
IEEE J. Solid State Circuits, 2011
Survey of Robustness Enhancement Techniques for Wireless Systems-on-a-Chip and Study of Temperature as Observable for Process Variations.
J. Electron. Test., 2011
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2011), 2011
Proceedings of the 37th European Solid-State Circuits Conference, 2011
2010
Attenuation-Predistortion Linearization of CMOS OTAs With Digital Correction of Process Variations in OTA-C Filter Applications.
IEEE J. Solid State Circuits, 2010
A Sixth-Order 200 MHz IF Bandpass Sigma-Delta Modulator With Over 68 dB SNDR in 10 MHz Bandwidth.
IEEE J. Solid State Circuits, 2010
A 25 MHz Bandwidth 5th-Order Continuous-Time Low-Pass Sigma-Delta Modulator With 67.7 dB SNDR Using Time-Domain Quantization and Feedback.
IEEE J. Solid State Circuits, 2010
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2010), May 30, 2010
2009
Recent Advances on the Design of High-Gain Wideband Operational Transconductance Amplifiers.
VLSI Design, 2009
IEEE Trans. Educ., 2009
IEEE Trans. Circuits Syst. II Express Briefs, 2009
IEEE Trans. Circuits Syst. I Regul. Pap., 2009
Design of Three-Stage Class-AB 16ΩHeadphone Driver Capable of Handling Wide Range of Load Capacitance.
IEEE J. Solid State Circuits, 2009
IEEE J. Solid State Circuits, 2009
Proceedings of the 2009 IEEE International Test Conference, 2009
A 20MHz BW 68dB DR CT ΔΣ ADC based on a multi-bit time-domain quantizer and feedback element.
Proceedings of the IEEE International Solid-State Circuits Conference, 2009
A 1.8V, sub-mW, over 100% locking range, divide-by-3 and 7 complementary-injection-locked 4 GHz frequency divider.
Proceedings of the IEEE Custom Integrated Circuits Conference, 2009
2008
IEEE Trans. Instrum. Meas., 2008
IEEE Trans. Circuits Syst. II Express Briefs, 2008
IEEE Trans. Circuits Syst. I Regul. Pap., 2008
IEEE Trans. Circuits Syst. I Regul. Pap., 2008
IEEE J. Solid State Circuits, 2008
A 1.2mW 1.6Vpp-Swing Class-AB 16Ω Headphone Driver Capable of Handling Load Capacitance up to 22nF.
Proceedings of the 2008 IEEE International Solid-State Circuits Conference, 2008
Proceedings of the IEEE 2008 Custom Integrated Circuits Conference, 2008
2007
Low-Power Fully Integrated CMOS DTV Tuner Front-End for ATSC Terrestrial Broadcasting.
VLSI Design, 2007
An Injection-Locked Frequency Divider With Multiple Highly Nonlinear Injection Stages and Large Division Ratios.
IEEE Trans. Circuits Syst. II Express Briefs, 2007
IEEE Trans. Circuits Syst. I Regul. Pap., 2007
A 30-MHz Fifth-Order Elliptic Low-Pass CMOS Filter With 65-dB Spurious-Free Dynamic Range.
IEEE Trans. Circuits Syst. I Regul. Pap., 2007
Estimation of Aliasing Effects Due to Periodical Nonuniform Individual Sampling in High-<i>Q</i> Switched-Capacitor Filters.
IEEE Trans. Circuits Syst. II Express Briefs, 2007
Low-Power Architecture and Circuit Techniques for High-Boost Wide-Band G<sub>m</sub>-C Filters.
IEEE Trans. Circuits Syst. I Regul. Pap., 2007
IEEE Trans. Circuits Syst. II Express Briefs, 2007
IEEE J. Solid State Circuits, 2007
IEEE J. Solid State Circuits, 2007
A 63 dB SNR, 75-mW Bandpass RF ΣΔ ADC at 950 MHz Using 3.8-GHz Clock in 0.25-µm SiGe BiCMOS Technology.
IEEE J. Solid State Circuits, 2007
IEEE J. Solid State Circuits, 2007
A Fully Differential Low-Power Divide-by-8 Injection-Locked Frequency Divider Up to 18 GHz.
IEEE J. Solid State Circuits, 2007
A CMOS 1Gb/s 5-Tap Transversal Equalizer Based on Inductorless 3rd-Order Delay Cells.
Proceedings of the 2007 IEEE International Solid-State Circuits Conference, 2007
2006
A 92-MHz 13-bit IF digitizer using optimized SC integrators in 0.35-μm CMOS technology.
IEEE Trans. Circuits Syst. II Express Briefs, 2006
A CMOS 140-mW fourth-order continuous-time low-pass filter stabilized with a class AB common-mode feedback operating at 550 MHz.
IEEE Trans. Circuits Syst. I Regul. Pap., 2006
IEEE Trans. Circuits Syst. II Express Briefs, 2006
Design and Analysis of an Ultrahigh-Speed Glitch-Free Fully Differential Charge Pump With Minimum Output Current Variation and Accurate Matching.
IEEE Trans. Circuits Syst. II Express Briefs, 2006
Frequency-dependent harmonic-distortion analysis of a linearized cross-coupled CMOS OTA and its application to OTA-C filters.
IEEE Trans. Circuits Syst. I Regul. Pap., 2006
Quasi Rail-to-Rail Very Low-Voltage OPAMP With a Single pMOS Input Differential Pair.
IEEE Trans. Circuits Syst. II Express Briefs, 2006
IEEE Trans. Circuits Syst. I Regul. Pap., 2006
An overview of feed-forward design techniques for high-gain wideband operational transconductance amplifiers.
Microelectron. J., 2006
An Integrated Frequency Response Characterization System With a Digital Interface for Analog Testing.
IEEE J. Solid State Circuits, 2006
IEEE Des. Test Comput., 2006
2005
IEEE J. Solid State Circuits, 2005
Proceedings of the 23rd IEEE VLSI Test Symposium (VTS 2005), 2005
2004
OTA linearity enhancement technique for high frequency applications with IM3 below -65 dB.
IEEE Trans. Circuits Syst. II Express Briefs, 2004
IEEE Trans. Circuits Syst. I Regul. Pap., 2004
Proceedings of the 22nd IEEE VLSI Test Symposium (VTS 2004), 2004
Proceedings of the 2004 International Symposium on Circuits and Systems, 2004
6.8 mW 2.5 Gb/s and 42.5 mW 5 Gb/s 1: 8 CMOS demultiplexers.
Proceedings of the 2004 International Symposium on Circuits and Systems, 2004
A 500 MHz OTA-C 4<sup>th</sup> order lowpass filter with class AB CMFB in 0.35 μm CMOS technology.
Proceedings of the IEEE 2004 Custom Integrated Circuits Conference, 2004
2003
IEEE Trans. Circuits Syst. II Express Briefs, 2003
A robust feedforward compensation scheme for multistage operational transconductance amplifiers with no Miller capacitors.
IEEE J. Solid State Circuits, 2003
A 60-mW 200-MHz continuous-time seventh-order linear phase filter with on-chip automatic tuning system.
IEEE J. Solid State Circuits, 2003
A 2.4-GHz monolithic fractional-N frequency synthesizer with robust phase-switching prescaler and loop capacitance multiplier.
IEEE J. Solid State Circuits, 2003
A 2.7-V 1.8-GHz fourth-order tunable LC bandpass filter based on emulation of magnetically coupled resonators.
IEEE J. Solid State Circuits, 2003
A fully balanced pseudo-differential OTA with common-mode feedforward and inherent common-mode feedback detector.
IEEE J. Solid State Circuits, 2003
IEEE J. Solid State Circuits, 2003
A 2-V<sub>pp</sub> 80-200-MHz fourth-order continuous-time linear phase filter with automatic frequency tuning.
IEEE J. Solid State Circuits, 2003
IEEE J. Solid State Circuits, 2003
Proceedings of the 2003 International Conference on Microelectronics Systems Education, 2003
Proceedings of the 2003 International Symposium on Circuits and Systems, 2003
A 92MHz, 80dB peak SNR SC bandpass ΣΔ modulator based on a high GBW OTA with no Miller capacitors in 0.35μm CMOS technology.
Proceedings of the IEEE Custom Integrated Circuits Conference, 2003
Proceedings of the IEEE Custom Integrated Circuits Conference, 2003
OTA linearity enhancement technique for high frequency applications with IM3 below -65dB.
Proceedings of the IEEE Custom Integrated Circuits Conference, 2003
2002
A CMOS transconductance amplifier architecture with wide tuning range for very low frequency applications.
IEEE J. Solid State Circuits, 2002
Transconductance amplifier structures with very small transconductances: a comparative design approach.
IEEE J. Solid State Circuits, 2002
A 2.1-GHz monolithic frequency synthesizer with robust phase switching prescaler and loop capacitance scaling.
Proceedings of the 2002 International Symposium on Circuits and Systems, 2002
Proceedings of the 2002 International Symposium on Circuits and Systems, 2002
A 1.8V CMOS, 80-200MHz continuous-time 4th order 0.05° equiripple linear phase filter with automatic tuning system.
Proceedings of the 2002 International Symposium on Circuits and Systems, 2002
Proceedings of the 2002 International Symposium on Circuits and Systems, 2002
A high-Q, switched-capacitor filter with reduced capacitance spread using a randomized nonuniform sampling technique.
Proceedings of the 2002 International Symposium on Circuits and Systems, 2002
Proceedings of the IEEE 2002 Custom Integrated Circuits Conference, 2002
2001
A low voltage operational transconductance amplifier using common mode feedforward for high frequency switched capacitor circuits.
Proceedings of the 2001 International Symposium on Circuits and Systems, 2001
A 150 MHz continuous-time seventh order 0.05° equiripple linear phase filter with automatic tuning system.
Proceedings of the 2001 International Symposium on Circuits and Systems, 2001
Proceedings of the 2001 International Symposium on Circuits and Systems, 2001
Proceedings of the 2001 8th IEEE International Conference on Electronics, 2001
2000
Different operational transconductance amplifier topologies for obtaining very small transconductances.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2000
A fully-programmable temperature-compensated analogue circuit for Gaussian functions.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2000
1999
Proceedings of the 1999 International Symposium on Circuits and Systems, ISCAS 1999, Orlando, Florida, USA, May 30, 1999
Transimpedance amplifiers for optical fiber systems based on common-base transistors.
Proceedings of the 1999 International Symposium on Circuits and Systems, ISCAS 1999, Orlando, Florida, USA, May 30, 1999
1998
Proceedings of the 5th IEEE International Conference on Electronics, Circuits and Systems, 1998
Proceedings of the 5th IEEE International Conference on Electronics, Circuits and Systems, 1998
1995
Proceedings of the 1995 IEEE International Symposium on Circuits and Systems, ISCAS 1995, Seattle, Washington, USA, April 30, 1995
1994
Proceedings of the 1994 IEEE International Symposium on Circuits and Systems, ISCAS 1994, London, England, UK, May 30, 1994
Proceedings of the 1994 IEEE International Symposium on Circuits and Systems, ISCAS 1994, London, England, UK, May 30, 1994
1993
High-performance CMOS continuous-time filters.
The Kluwer international series in engineering and computer science 223, Kluwer, ISBN: 978-0-7923-9339-9, 1993