Bhaskar Manickam
Orcid: 0000-0002-2113-0301Affiliations:
- National Institute of Technology, NIT, RF CMOS IC Design Laboratory, Department of Electronics and Communication Engineering, Tiruchirappalli, India
According to our database1,
Bhaskar Manickam
authored at least 24 papers
between 2010 and 2023.
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Bibliography
2023
Design and FPGA Implementation of Pre-computation Based Radix-4 Hyperbolic CORDIC for Direct Digital Synthesis.
J. Signal Process. Syst., June, 2023
FPGA Implementation of Modified Lightweight 128-Bit AES Algorithm for IoT Applications.
Proceedings of the IEEE International Symposium on Smart Electronic Systems, 2023
An Integrated 2.4 GHz Inductorless Power Amplifier and On-Chip Two Turn Folded Loop Antenna for biotelemetry applications.
Proceedings of the 14th International Conference on Computing Communication and Networking Technologies, 2023
2022
Design and application of CMOS active inductor in bandpass filter and VCO for reconfigurable RF front-end.
Integr., 2022
A 60-GHz low-noise amplifier with +7.258-dBm third-order input intercept point using current reuse feedforward distortion cancellation for 5G emerging communication.
Int. J. Circuit Theory Appl., 2022
Circuits Syst. Signal Process., 2022
2021
A 4-6 GHz Single-Ended to Differential-Ended Low-Noise Amplifier for IEEE 802.11ax Wireless Applications with Inherent Complementary Distortion Cancellation.
J. Circuits Syst. Comput., 2021
Design and FPGA Implementation of High-Speed Area and Power Efficient 64-bit Modified Dual CLCG based Pseudo Random Bit Generator.
Proceedings of the IEEE International Symposium on Smart Electronic Systems, 2021
2020
CASINOR: Combination of adaptive filters using single noise reference signal for heart rate estimation from PPG signals.
Signal Image Video Process., 2020
An inductorless 1.8 mW 2.9 dB NF differential LNA integrated to on-chip loop antenna with secondary loop for biomedical applications.
Microelectron. J., 2020
Multiple cascode flipped active inductor-based tunable bandpass filter for fully integrated RF front-end.
IET Circuits Devices Syst., 2020
Comput. Electr. Eng., 2020
Heart rate estimation from wrist-type photoplethysmography signals during physical exercise.
Biomed. Signal Process. Control., 2020
Design and Implementation of 1024 Point Pipelined Radix 4 FFT Processor on FPGA for Biomedical Signal Processing Applications.
Proceedings of the IEEE International Symposium on Smart Electronic Systems, 2020
2019
Co-design of on-chip loop antenna and differential class-E power amplifier at 2.4 GHz for biotelemetry applications.
Microelectron. J., 2019
Heart rate estimation from photoplethysmography signal for wearable health monitoring devices.
Biomed. Signal Process. Control., 2019
A 2.4 GHz High Efficiency Capacitive Cross Coupled Common Gate Class-E Differential Power Amplifier.
Proceedings of the VLSI Design and Test - 23rd International Symposium, 2019
A low power wideband low-noise amplifier with input series peaking and $g_{m}$ enhancement for 0.5 - 3.5 GHz applications.
Proceedings of the TENCON 2019, 2019
2018
Improved Heart Rate Estimation from Photoplethysmography During Physical Exercise Using Combination of NLMS and RLS Adaptive Filters.
Proceedings of the TENCON 2018, 2018
Gyrator-C Based Bandpass Filter with Improved Dynamic Range for Fully Integrated RF Front-End.
Proceedings of the 2018 IEEE Computer Society Annual Symposium on VLSI, 2018
2017
Proceedings of the VLSI Design and Test - 21st International Symposium, 2017
2014
J. Low Power Electron., 2014
2013
Design of a novel differential on-chip wave-pipelined serial interconnect with surfing.
Microprocess. Microsystems, 2013
2010
Proceedings of the VLSI Design 2010: 23rd International Conference on VLSI Design, 2010