Bindu G. Gowda

Orcid: 0000-0003-2797-2363

According to our database1, Bindu G. Gowda authored at least 7 papers between 2022 and 2024.

Collaborative distances:
  • Dijkstra number2 of six.
  • Erdős number3 of five.

Timeline

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Bibliography

2024
OEDASA: Optimization Enabled Error-Diluted Approximate Systolic Array Design for an Image Processing Application.
Proceedings of the 37th International Conference on VLSI Design and 23rd International Conference on Embedded Systems, 2024

2023
Design-Space Exploration of Multiplier Approximation in CNNs.
Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2023

Error Diluted Approximate Multipliers Using Positive And Negative Compressors.
Proceedings of the 24th International Symposium on Quality Electronic Design, 2023

ApproxCNN: Evaluation Of CNN With Approximated Layers Using In-Exact Multipliers.
Proceedings of the 41st IEEE International Conference on Computer Design, 2023

EBASA: Error Balanced Approximate Systolic Array Architecture Design.
Proceedings of the Great Lakes Symposium on VLSI 2023, 2023

IMAC: : A Pre-Multiplier And Integrated Reduction Based Multiply-And-Accumulate Unit.
Proceedings of the Great Lakes Symposium on VLSI 2023, 2023

2022
Design and Evaluation of In-Exact Compressor based Approximate Multipliers.
Proceedings of the GLSVLSI '22: Great Lakes Symposium on VLSI 2022, Irvine CA USA, June 6, 2022


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