Bo Yang
Affiliations:- NVIDIA
- Polytechnic Institute of New York University
According to our database1,
Bo Yang
authored at least 11 papers
between 2004 and 2006.
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Bibliography
2006
Tamper Proofing by Design Using Generalized Involution-Based Concurrent Error Detection for Involutional Substitution Permutation and Feistel Networks.
IEEE Trans. Computers, 2006
IEEE J. Sel. Areas Commun., 2006
2005
IACR Cryptol. ePrint Arch., 2005
A constant array multiplier core generator with dynamic partial evaluation architecture selection (abstract only).
Proceedings of the ACM/SIGDA 13th International Symposium on Field Programmable Gate Arrays, 2005
Proceedings of the 42nd Design Automation Conference, 2005
Power optimization for universal hash function data path using divide-and-concatenate technique.
Proceedings of the 3rd IEEE/ACM/IFIP International Conference on Hardware/Software Codesign and System Synthesis, 2005
2004
Microprocess. Microsystems, 2004
IACR Cryptol. ePrint Arch., 2004
Scan Based Side Channel Attack on Dedicated Hardware Implementations of Data Encryption Standard.
Proceedings of the Proceedings 2004 International Test Conference (ITC 2004), 2004
Proceedings of the ACM/SIGDA 12th International Symposium on Field Programmable Gate Arrays, 2004
Divide-and-concatenate: an architecture level optimization technique for universal hash functions.
Proceedings of the 41th Design Automation Conference, 2004