Bouthaina Damak

Orcid: 0000-0003-4826-6695

According to our database1, Bouthaina Damak authored at least 13 papers between 2010 and 2024.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

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PhD thesis 
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Online presence:

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Bibliography

2024
Design Space Exploration of HW Accelerators and Network Infrastructure for FPGA-Based MPSoC.
IEEE Access, 2024

2023
Correction to: Multi-objective approach for scheduling time-aware business processes in cloud-fog environment.
J. Supercomput., May, 2023

Multi-objective approach for scheduling time-aware business processes in cloud-fog environment.
J. Supercomput., May, 2023

NFT-IoT Pharma Chain : IoT Drug traceability system based on Blockchain and Non Fungible Tokens (NFTs).
J. King Saud Univ. Comput. Inf. Sci., February, 2023

2022
LoRaChainCare: An IoT Architecture Integrating Blockchain and LoRa Network for Personal Health Care Data Monitoring.
Sensors, 2022

A Private Smart parking solution based on Blockchain and AI.
Proceedings of the 15th International Conference on Security of Information and Networks, 2022

2018
From Dynamic UML/MARTE Models to Early Schedulability Analysis of RTES with Dependent Tasks.
Proceedings of the Intelligent Systems Design and Applications, 2018

2015
Hardware resource utilization optimization in FPGA-based Heterogeneous MPSoC architectures.
Microprocess. Microsystems, 2015

Framework for a Selection of Custom Instructions for Ht-MPSoC in Area-performance Aware Manner.
IEEE Embed. Syst. Lett., 2015

2014
A mixed integer linear programming approach for design space exploration in FPGA-based MPSoC.
Proceedings of the 24th International Conference on Field Programmable Logic and Applications, 2014

Design Space Exploration for Customized Asymmetric Heterogeneous MPSoC.
Proceedings of the 17th Euromicro Conference on Digital System Design, 2014

2013
Shared hardware accelerator architectures for heterogeneous MPSoCs.
Proceedings of the 2013 8th International Workshop on Reconfigurable and Communication-Centric Systems-on-Chip (ReCoSoC), 2013

2010
Soft-core reduction methodology for SIMD architecture: OPENRISC case study.
Proceedings of the 5th International Design and Test Workshop, 2010


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