Byung Chul Jang

According to our database, Byung Chul Jang authored at least 5 papers between 2016 and 2025.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of five.

2025

Understanding of Incremental Step Pulse Programming (ISPP) Slope Degradation in 3D NAND and its Band-Engineered Trap Layer Solution.

Ki Han Kim, Woo Cheol Shin, Ui Do Ji, Yeong Kwon Kim, Namju Kim, Han Byeol Oh, Sang Hyun Oh, Byung Chul Jang

Proceedings of the IEEE International Reliability Physics Symposium, 2025

Proposal of Block Erase and Verify Schemes for Ferroelectric NAND: Overcoming Critical Challenges from Threshold Voltage Polarity.

Song-Hyeon Kuk, Bong Ho Kim, Young-Keun Park, Hyeon-Seong Hwang, Jae-Hoon Han, Byung Jin Cho, Byung Chul Jang, Sang-Hyeon Kim

Proceedings of the IEEE International Memory Workshop, 2025

2022

Memristor-Based Security Primitives Robust to Malicious Attacks for Highly Secure Neuromorphic Systems.

Jungyeop Oh, Sungkyu Kim, Junhwan Choi, Jun-Hwe Cha, Sung Gap Im, Byung Chul Jang, Sung-Yool Choi

Adv. Intell. Syst., 2022

Highly Reliable Synaptic Cell Array Based on Organic-Inorganic Hybrid Bilayer Stack toward Precise Offline Learning.

Jun-Hwe Cha, Byung Chul Jang, Jungyeop Oh, Changhyeon Lee, Sang Yoon Yang, Hamin Park, Sung Gap Im, Sung-Yool Choi

Adv. Intell. Syst., 2022

2016

Floating gate memory based on MoS2 channel and iCVD polymer tunneling dielectric.

Myung Hun Woo, Byung Chul Jang, Junhwan Choi, Gwang Hyuk Shin, Hyejeong Seong, Sung Gap Im, Sung-Yool Choi

Proceedings of the 46th European Solid-State Device Research Conference, 2016