Byung-Su Kim
According to our database1,
Byung-Su Kim
authored at least 11 papers
between 2011 and 2025.
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Bibliography
2025
A digital dynamic power monitor based adaptive clocking system for voltage droop mitigation in 5nm mobile application processor.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2025
2024
An Area-Efficient True Single-Phase Clocked and Conditional Capture Flip-Flop for Ultra-Low-Power Operations in 7nm Fin-FET Process.
Proceedings of the IEEE Symposium on VLSI Technology and Circuits 2024, 2024
2018
IEICE Electron. Express, 2018
Bayesian theory based switching probability calculation method of critical timing path for on-chip timing slack monitoring.
Proceedings of the 2018 Design, Automation & Test in Europe Conference & Exhibition, 2018
System level performance analysis and optimization for the adaptive clocking based multi-core processor.
Proceedings of the 23rd Asia and South Pacific Design Automation Conference, 2018
2017
Non-linear library characterization method for FinFET logic cells by L1-minimization.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2017
2016
AFSEM: Advanced frequent subcircuit extraction method by graph mining approach for optimized cell library developments.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2016
2013
IEEE Trans. Very Large Scale Integr. Syst., 2013
Human-centered evaluation of multi-user teleoperation for mobile manipulator in unmanned offshore plants.
Proceedings of the 2013 IEEE/RSJ International Conference on Intelligent Robots and Systems, 2013
2011
Proceedings of the International SoC Design Conference, 2011
Proceedings of the 2011 IEEE/ACM International Conference on Computer-Aided Design, 2011