C. Padma

Orcid: 0000-0002-8880-1624

According to our database¹, C. Padma authored at least 2 papers between 2021 and 2024.

Collaborative distances:

Timeline

Book In proceedings Article PhD thesis Dataset Other

2024

Design of a 64-bit SQRT-CSLA with Reduced Area and High-Speed Applications in Low Power VLSI Circuits.

[DOI]

CoRR, 2024

2021

Design of FFT processor using low power Vedic multiplier for wireless communication.

[DOI]

Comput. Electr. Eng., 2021