Che-Wei Tien

According to our database, Che-Wei Tien authored at least 3 papers between 2017 and 2019.

Collaborative distances:

• Dijkstra number of six.
• Erdős number of five.

2019

A PVT-Tolerant Injection-Locked Clock Multiplier With a Frequency Calibrator Using a Delay Time Detector.

Che-Wei Tien, Shen-Iuan Liu

IEEE Trans. Circuits Syst. II Express Briefs, 2019

2018

A Digital Phase-Locked Loop With Background Supply Voltage Sensitivity Minimization.

Che-Wei Tien, Shen-Iuan Liu

IEEE Trans. Circuits Syst. I Regul. Pap., 2018

2017

Optimal design of Ge-dot photoMOSFETs for highly-integrated monolithic Si photonics.

Ming-Hao Kuo, Meng Chun Lee, Che-Wei Tien, Wei-Ting Lai, Pei-Wen Li

Proceedings of the Optical Fiber Communications Conference and Exhibition, 2017