Cheeckottu Vayalil Niras

According to our database, Cheeckottu Vayalil Niras authored at least 8 papers between 2014 and 2019.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of five.

2019

A Residue Number System Hardware Design of Fast-Search Variable-Motion-Estimation Accelerator for HEVC/H.265.

Vayalil C. Niras, Manoranjan Paul, Yinan Kong

IEEE Trans. Circuits Syst. Video Technol., 2019

2017

High-performance elliptic curve cryptography processor over NIST prime fields.

Md. Selim Hossain, Yinan Kong, Ehsan Saeedi, Cheeckottu Vayalil Niras

IET Comput. Digit. Tech., 2017

VLSI Architecture of Full-Search Variable-Block-Size Motion Estimation for HEVC Video Encoding.

Cheeckottu Vayalil Niras, Yinan Kong

IET Circuits Devices Syst., 2017

A novel angle-restricted test zone search algorithm for performance improvement of HEVC.

Cheeckottu Vayalil Niras, Manoranjan Paul, Yinan Kong

Proceedings of the 2017 IEEE International Conference on Image Processing, 2017

2016

Power-performance enhancement of two-dimensional RNS-based DWT image processor using static voltage scaling.

Azadeh Safari, Cheeckottu Vayalil Niras, Yinan Kong

Integr., 2016

Fast sign-detection algorithm for residue number system moduli set {2^<i>n</i> - 1, 2^<i>n</i>, 2^<i>n</i>+1 - 1}.

Cheeckottu Vayalil Niras, Yinan Kong

IET Comput. Digit. Tech., 2016

An Efficient ASIC Design of Variable-Length Discrete Cosine Transform for HEVC.

Cheeckottu Vayalil Niras, Joshua Haddrill, Yinan Kong

Proceedings of the 2016 European Modelling Symposium, 2016

2014

A low-cost architecture for DWT filter banks in RNS applications.

Yinan Kong, Azadeh Safari, Cheeckottu Vayalil Niras

Proceedings of the 2014 International Symposium on Integrated Circuits (ISIC), 2014