Yinan Kong

Orcid: 0000-0002-2407-9855

According to our database1, Yinan Kong authored at least 58 papers between 2009 and 2023.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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On csauthors.net:

Bibliography

2023
Edge enhanced deep learning system for IoT edge device security analytics.
Concurr. Comput. Pract. Exp., 2023

2022
A fast and accurate iris segmentation method using an LoG filter and its zero-crossings.
CoRR, 2022

An overview of deep learning techniques for epileptic seizures detection and prediction based on neuroimaging modalities: Methods, challenges, and future works.
Comput. Biol. Medicine, 2022

Machine-Learning Assisted Side-Channel Attacks on RNS ECC Implementations Using Hybrid Feature Engineering.
Proceedings of the Constructive Side-Channel Analysis and Secure Design, 2022

2021
Fake it till you make it: Data Augmentation using Generative Adversarial Networks for all the crypto you need on small devices.
IACR Cryptol. ePrint Arch., 2021

Automatic Diagnosis of Schizophrenia in EEG Signals Using CNN-LSTM Models.
Frontiers Neuroinformatics, 2021

Automatic Diagnosis of Schizophrenia using EEG Signals and CNN-LSTM Models.
CoRR, 2021

Applications of Epileptic Seizures Detection in Neuroimaging Modalities Using Deep Learning Techniques: Methods, Challenges, and Future Works.
CoRR, 2021

Deep learning for neuroimaging-based diagnosis and rehabilitation of Autism Spectrum Disorder: A review.
Comput. Biol. Medicine, 2021

2020
Real-time iris segmentation and its implementation on FPGA.
J. Real Time Image Process., 2020

Machine-Learning assisted Side-Channel Attacks on RNS-based Elliptic Curve Implementations using Hybrid Feature Engineering.
IACR Cryptol. ePrint Arch., 2020

Improved Hybrid Approach for Side-Channel Analysis Using Efficient Convolutional Neural Network and Dimensionality Reduction.
IEEE Access, 2020

2019
A Residue Number System Hardware Design of Fast-Search Variable-Motion-Estimation Accelerator for HEVC/H.265.
IEEE Trans. Circuits Syst. Video Technol., 2019

Efficient hardware implementation strategy for local normalization of fingerprint images.
J. Real Time Image Process., 2019

Feed-Forward Back-Propagation Neural Networks in Side-Channel Information Characterization.
J. Circuits Syst. Comput., 2019

The investigation of neural networks performance in side-channel attacks.
Artif. Intell. Rev., 2019

2018
A Fully RNS based ECC Processor.
Integr., 2018

Histopathological Breast-Image Classification Using Local and Frequency Domains by Convolutional Neural Network.
Inf., 2018

65-nm CMOS low-energy RNS modular multiplier for elliptic-curve cryptography.
IET Comput. Digit. Tech., 2018

FPGA Implementation of Modular Multiplier in Residue Number System.
Proceedings of the IEEE International Conference on Internet of Things and Intelligence System, 2018

Secret Key Classification Based on Electromagnetic Analysis and Feature Extraction Using Machine-Learning Approach.
Proceedings of the Future Network Systems and Security - 4th International Conference, 2018

2017
Efficient Hardware Implementation For Fingerprint Image Enhancement Using Anisotropic Gaussian Filter.
IEEE Trans. Image Process., 2017

Side-channel attacks and learning-vector quantization.
Frontiers Inf. Technol. Electron. Eng., 2017

High-performance elliptic curve cryptography processor over NIST prime fields.
IET Comput. Digit. Tech., 2017

High-throughput multi-key elliptic curve cryptosystem based on residue number system.
IET Comput. Digit. Tech., 2017

VLSI Architecture of Full-Search Variable-Block-Size Motion Estimation for HEVC Video Encoding.
IET Circuits Devices Syst., 2017

Highly Parallel Modular Multiplier for Elliptic Curve Cryptography in Residue Number System.
Circuits Syst. Signal Process., 2017

Involvement of Machine Learning for Breast Cancer Image Classification: A Survey.
Comput. Math. Methods Medicine, 2017

Frequency-domain information along with LSTM and GRU methods for histopathological breast-image classification.
Proceedings of the 2017 IEEE International Symposium on Signal Processing and Information Technology, 2017

A novel angle-restricted test zone search algorithm for performance improvement of HEVC.
Proceedings of the 2017 IEEE International Conference on Image Processing, 2017

Local and Global Feature Utilization for Breast Image Classification by Convolutional Neural Network.
Proceedings of the 2017 International Conference on Digital Image Computing: Techniques and Applications, 2017

2016
A spatial domain scar removal strategy for fingerprint image enhancement.
Pattern Recognit., 2016

Power-performance enhancement of two-dimensional RNS-based DWT image processor using static voltage scaling.
Integr., 2016

Fast sign-detection algorithm for residue number system moduli set {2<sup> <i>n</i> </sup> - 1, 2<sup> <i>n</i> </sup>, 2<sup> <i>n</i>+1</sup> - 1}.
IET Comput. Digit. Tech., 2016

Side-Channel Information Characterisation Based on Cascade-Forward Back-Propagation Neural Network.
J. Electron. Test., 2016

Stopping criterion for linear anisotropic image diffusion: a fingerprint image enhancement case.
EURASIP J. Image Video Process., 2016

Modular multiplication using the core function in the residue number system.
Appl. Algebra Eng. Commun. Comput., 2016

High-Performance FPGA Implementation of Elliptic Curve Cryptography Processor over Binary Field GF(2^163).
Proceedings of the 2nd International Conference on Information Systems Security and Privacy, 2016

An Efficient ASIC Design of Variable-Length Discrete Cosine Transform for HEVC.
Proceedings of the 2016 European Modelling Symposium, 2016

Performance Analysis of Integrated Canny and Fuzzy-Logic Based (2-by-2 Cell Block) Edge-Detection Algorithms.
Proceedings of the 2016 European Modelling Symposium, 2016

Breast Image Classification Based on Concatenated Statistical, Structural and Textural Features.
Proceedings of the 2016 European Modelling Symposium, 2016

2015
Multi-class SVMs analysis of side-channel information of elliptic curve cryptosystem.
Proceedings of the International Symposium on Performance Evaluation of Computer and Telecommunication Systems, 2015

FPGA-based efficient modular multiplication for Elliptic Curve Cryptography.
Proceedings of the International Telecommunication Networks and Applications Conference, 2015

Performance Analysis of Integrated Canny and Fuzzy Logic Based (3-by-3 Cell Block) Edge Detection Algorithms.
Proceedings of the IEEE International Conference on Data Science and Data Intensive Systems, 2015

High-Speed, Area-Efficient, FPGA-Based Elliptic Curve Cryptographic Processor over NIST Binary Fields.
Proceedings of the IEEE International Conference on Data Science and Data Intensive Systems, 2015

High-Performance FPGA Implementation of Modular Inversion over F_256 for Elliptic Curve Cryptography.
Proceedings of the IEEE International Conference on Data Science and Data Intensive Systems, 2015

2014
Low-Area Wallace Multiplier.
VLSI Design, 2014

A low-cost architecture for DWT filter banks in RNS applications.
Proceedings of the 2014 International Symposium on Integrated Circuits (ISIC), 2014

Operational capability and suitability of image compression methods for different applications.
Proceedings of the IEEE 27th Canadian Conference on Electrical and Computer Engineering, 2014

A novel approach for improving error detection and correction in WSN.
Proceedings of the IEEE 27th Canadian Conference on Electrical and Computer Engineering, 2014

2013
Novel implementation of full adder based scaling in Residue Number Systems.
Proceedings of the IEEE 56th International Midwest Symposium on Circuits and Systems, 2013

Low latency modular multiplication for public-key cryptosystems using a scalable array of parallel processing elements.
Proceedings of the IEEE 56th International Midwest Symposium on Circuits and Systems, 2013

2012
Four tap Daubechies filter banks based on RNS.
Proceedings of the International Symposium on Communications and Information Technologies, 2012

An implementation of a scaler in the Residue number System.
Proceedings of the International Symposium on Communications and Information Technologies, 2012

Digital traffic controller on the Altium NanoBoard.
Proceedings of the International Symposium on Communications and Information Technologies, 2012

2010
Revisiting Sum of Residues Modular Multiplication.
J. Electr. Comput. Eng., 2010

Highly parallel modular multiplication in the residue number system using sum of residues reduction.
Appl. Algebra Eng. Commun. Comput., 2010

2009
Fast Scaling in the Residue Number System.
IEEE Trans. Very Large Scale Integr. Syst., 2009


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