Chen Zhang

Orcid: 0000-0003-2445-0754

Affiliations:
  • Peking University, School of Electronic and Computer Engineering, Shenzhen Graduate School, China (PhD 2024)


According to our database1, Chen Zhang authored at least 8 papers between 2020 and 2026.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

Book  In proceedings  Article  PhD thesis  Dataset  Other 

Links

Online presence:

On csauthors.net:

Bibliography

2026
A hardware-efficient QRS detection ASIC using sparse hilbert transform for mobile ECG monitoring in 55-nm CMOS.
Microelectron. J., 2026

2025
An Energy-Efficient Configurable 1-D CNN-Based Multi-Lead ECG Classification Coprocessor for Wearable Cardiac Monitoring Devices.
IEEE Trans. Biomed. Circuits Syst., April, 2025

2024
A Low Power High-Voltage Floating Output Level Shifter with Asymmetric Delay Reduction.
Proceedings of the 67th IEEE International Midwest Symposium on Circuits and Systems, 2024

An Energy-Efficient Configurable Coprocessor Based on 1-D CNN for ECG Anomaly Detection.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2024

Exploration for Efficient Depthwise Separable Convolution Networks Deployment on FPGA.
Proceedings of the 6th IEEE International Conference on AI Circuits and Systems, 2024

2023
A configurable hardware-efficient ECG classification inference engine based on CNN for mobile healthcare applications.
Microelectron. J., November, 2023

2020
A Wide Input Range 8/16x Time Amplifier with Gated Ring Oscillator Based Time Registers.
Proceedings of the 63rd IEEE International Midwest Symposium on Circuits and Systems, 2020

A Low-power Synthesizable Time-to-Digital Converter using Amplification to Overcome Mismatch.
Proceedings of the 63rd IEEE International Midwest Symposium on Circuits and Systems, 2020


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