Chengcheng Zhang

Orcid: 0009-0003-6846-4709

Affiliations:
  • Huazhong University of Science and Technology, College of Integrated Circuits, School of Optical and Electronic Information, China


According to our database1, Chengcheng Zhang authored at least 8 papers between 2021 and 2024.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of five.

Timeline

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Bibliography

2024
A TDC-assisted SAR ADC with high-speed sampling switches and fine-tuned delay cells.
Microelectron. J., 2024

A Fractional-N DTC-based ADPLL using path-select multi-delay line TDC and true fractional division technique.
Microelectron. J., 2024

2023
A 0.4-to-0.8 V 0.1-to-5 MS/s 10 b two-step SAR ADC with TDC-based fine quantizer in 40-nm CMOS.
Microelectron. J., November, 2023

A 12-bit single slope ADC with multi-step structure and ramp calibration technique for image sensors.
Microelectron. J., September, 2023

A Fractional-<i>N C</i>P-PLL with fast two-point modulation calibration using duty-cycle and polarity tracking technique in 110-nm CMOS.
Microelectron. J., February, 2023

A DTC-based Fractional-<i>N</i> DPLL using probability-density-shaping spur immunity and Q-noise reduction techniques for IoT applications.
Microelectron. J., 2023

A DC Offset Cancellation Circuit Using Digital Assistance Technique and Self-Calibrating Comparator for RF Transceiver.
Proceedings of the 15th IEEE International Conference on ASIC, 2023

2021
An accurate ISF-based analysis and simulation method for phase noise in LC/Ring oscillators.
Microelectron. J., 2021


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