Ang Hu

Orcid: 0000-0003-0787-6964

According to our database1, Ang Hu authored at least 23 papers between 2018 and 2023.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

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Links

On csauthors.net:

Bibliography

2023
A 0.4-to-0.8 V 0.1-to-5 MS/s 10 b two-step SAR ADC with TDC-based fine quantizer in 40-nm CMOS.
Microelectron. J., November, 2023

A 12-bit single slope ADC with multi-step structure and ramp calibration technique for image sensors.
Microelectron. J., September, 2023

Fractional Spurs Reduction Technique Using Probability Density Shaping Sigma-Delta Modulator and Fractional Frequency Divider.
IEEE Trans. Circuits Syst. II Express Briefs, February, 2023

A Fractional-<i>N C</i>P-PLL with fast two-point modulation calibration using duty-cycle and polarity tracking technique in 110-nm CMOS.
Microelectron. J., February, 2023

A Flexible and High-Performance Lattice-Based Post-Quantum Crypto Secure Coprocessor.
IEEE Trans. Ind. Informatics, 2023

A DTC-based Fractional-<i>N</i> DPLL using probability-density-shaping spur immunity and Q-noise reduction techniques for IoT applications.
Microelectron. J., 2023

Multi-Probability Hash-based Random Number Generator for Post-Quantum Cryptography.
Proceedings of the 66th IEEE International Midwest Symposium on Circuits and Systems, 2023

Flexible and Efficient Implementation of CRYSTALS-KYBER SIMD RISC-V Coprocessor Based on Customized Vector Instruction-Set Extension.
Proceedings of the IEEE Asian Solid-State Circuits Conference, 2023

2022
An Efficient Unstructured Sparse Convolutional Neural Network Accelerator for Wearable ECG Classification Device.
IEEE Trans. Circuits Syst. I Regul. Pap., 2022

SAS-SEINet: A SNR-Aware Adaptive Scalable SEI Neural Network Accelerator Using Algorithm-Hardware Co-Design for High-Accuracy and Power-Efficient UAV Surveillance.
Sensors, 2022

A 640×512 ROIC with optimized BDI input stage and low power output buffer for CQDs-based infrared image sensor.
Microelectron. J., 2022

Efficient hardware design of a deep U-net model for pixel-level ECG classification in healthcare device.
Microelectron. J., 2022

An Instruction-configurable Post-quantum Cryptographic Processor towards NTRU.
Proceedings of the Asian Hardware Oriented Security and Trust Symposium, 2022

A High Throughput and Configurable Pseudo-random Number Extension Generator for Lattice-based Post-quantum Cryptography.
Proceedings of the IEEE Asia Pacific Conference on Circuit and Systems, 2022

2021
A 433/2400 MHz dual-band frequency synthesizer with glitch-free phase-interpolated frequency divider and hybrid post-synthesizer.
Microelectron. J., 2021

An accurate ISF-based analysis and simulation method for phase noise in LC/Ring oscillators.
Microelectron. J., 2021

A Power-Efficient Specific Emitter Identification Hardware Accelerator With SNR-Aware Adaptive Precision Reconfiguration.
Proceedings of the 2021 IEEE International Conference on Integrated Circuits, 2021

2020
A 0.045- to 2.5-GHz Frequency Synthesizer With TDC-Based AFC and Phase Switching Multi-Modulus Divider.
IEEE Trans. Circuits Syst., 2020

2019
A 0.03- to 3.6-GHz Frequency Synthesizer With Self-Biased VCO and Quadrature-Input Quadrature-Output Frequency Divider.
IEEE Trans. Circuits Syst. II Express Briefs, 2019

Analysis and optimization of seamless switching golden states of multi-modulus divider in software defined ∑-Δ Frequency synthesizer.
Microelectron. J., 2019

A 35µW Receiver Front-End with 35% wireless energy harvesting efficiency for Wearable Medical Applications.
Proceedings of the 13th IEEE International Conference on ASIC, 2019

RF Transceiver System Design: From Protocols to Specifications.
Proceedings of the 13th IEEE International Conference on ASIC, 2019

2018
A Quadrature Single Side-Band Mixer with Passive Negative Resistance in Software-Defined Frequency Synthesizer.
Sensors, 2018


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