Chenglong Xiao

According to our database, Chenglong Xiao authored at least 16 papers between 2011 and 2024.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of five.

2024

Reinforcement Learning for Selecting Custom Instructions Under Area Constraint.

Shanshan Wang, Chenglong Xiao

IEEE Trans. Artif. Intell., April, 2024

Algorithms with improved delay for enumerating connected induced subgraphs of a large cardinality.

Shanshan Wang, Chenglong Xiao, Emmanuel Casseau

Inf. Process. Lett., January, 2024

2021

An Optimal Algorithm for Enumerating Connected Convex Subgraphs in Acyclic Digraphs.

Chenglong Xiao, Shanshan Wang, Wanjun Liu, Xinlin Wang, Emmanuel Casseau

IEEE Trans. Circuits Syst. II Express Briefs, 2021

An algorithm with improved delay for enumerating connected induced subgraphs of a large cardinality.

Shanshan Wang, Chenglong Xiao, Emmanuel Casseau

CoRR, 2021

Algorithms for enumerating connected induced subgraphs of a given order.

Shanshan Wang, Chenglong Xiao

CoRR, 2021

2019

Parallel Enumeration of Custom Instructions Based on Multidepth Graph Partitioning.

Shanshan Wang, Chenglong Xiao, Wanjun Liu

IEEE Embed. Syst. Lett., 2019

2017

Parallel custom instruction identification for extensible processors.

Chenglong Xiao, Shanshan Wang, Wanjun Liu, Emmanuel Casseau

J. Syst. Archit., 2017

A Faster Algorithm for Enumerating Connected Convex Subgraphs in Acyclic Digraphs.

Shanshan Wang, Chenglong Xiao, Wanjun Liu

IEEE Embed. Syst. Lett., 2017

2016

A comparison of heuristic algorithms for custom instruction selection.

Shanshan Wang, Chenglong Xiao, Wanjun Liu, Emmanuel Casseau

Microprocess. Microsystems, 2016

2015

Selecting most profitable instruction-set extensions using ant colony heuristic.

Shanshan Wang, Chenglong Xiao, Wanjun Liu, Emmanuel Casseau, Xiao Yang

Proceedings of the 2015 Conference on Design and Architectures for Signal and Image Processing, 2015

2014

Automatic custom instruction identification for application-specific instruction set processors.

Chenglong Xiao, Emmanuel Casseau, Shanshan Wang, Wanjun Liu

Microprocess. Microsystems, 2014

Improving high-level synthesis effectiveness through custom operator identification.

Chenglong Xiao, Emmanuel Casseau

Proceedings of the IEEE International Symposium on Circuits and Systemss, 2014

2012

Exact custom instruction enumeration for extensible processors.

Chenglong Xiao, Emmanuel Casseau

Integr., 2012

2011

An efficient algorithm for custom instruction enumeration.

Chenglong Xiao, Emmanuel Casseau

Proceedings of the 21st ACM Great Lakes Symposium on VLSI 2010, 2011

Efficient maximal convex custom instruction enumeration for extensible processors.

Chenglong Xiao, Emmanuel Casseau

Proceedings of the 2011 Conference on Design and Architectures for Signal and Image Processing, 2011

Efficient custom instruction enumeration for extensible processors.

Chenglong Xiao, Emmanuel Casseau

Proceedings of the 22nd IEEE International Conference on Application-specific Systems, 2011