Chi-Tse Huang

Orcid: 0000-0003-0393-3976

According to our database1, Chi-Tse Huang authored at least 7 papers between 2021 and 2023.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of five.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
Other 

Links

On csauthors.net:

Bibliography

2023
Recent Progress and Development of Hyperdimensional Computing (HDC) for Edge Intelligence.
IEEE J. Emerg. Sel. Topics Circuits Syst., March, 2023

DEA-NIMC: Dynamic Energy-Aware Policy for Near/In-Memory Computing Hybrid Architecture.
Proceedings of the 36th IEEE International System-on-Chip Conference, 2023

BWA-NIMC: Budget-based Workload Allocation for Hybrid Near/In-Memory-Computing.
Proceedings of the 60th ACM/IEEE Design Automation Conference, 2023

Mitigating Non-ideality Issues of Analog Computing-In-Memory in DNN-based designs.
Proceedings of the 15th IEEE International Conference on ASIC, 2023

2022
D-NAT: Data-Driven Non-Ideality Aware Training Framework for Fabricated Computing-In-Memory Macros.
IEEE J. Emerg. Sel. Topics Circuits Syst., 2022

Automated Quantization Range Mapping for DAC/ADC Non-linearity in Computing-In-Memory.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2022

2021
PQ-HDC: Projection-Based Quantization Scheme for Flexible and Efficient Hyperdimensional Computing.
Proceedings of the Artificial Intelligence Applications and Innovations, 2021


  Loading...