Chia-Lung Hung

According to our database, Chia-Lung Hung authored at least 5 papers between 2009 and 2025.

Collaborative distances:

• Dijkstra number of six.
• Erdős number of five.

2025

AI-Driven Parameter Prediction for SiC Power MOSFETs Guard Ring Design.

Tejender Singh Rawat, Chia-Lung Hung, Yi-Kai Hsiao, Wei-Chen Yu, Surya Elangovan, Wei-Ting Lin, Hao-Chung Kuo

IEEE Access, 2025

2011

Efficient pipelined architecture for competitive learning.

Hui-Ya Li, Chia-Lung Hung, Wen-Jyi Hwang, Yi-Tsan Hung

J. Parallel Distributed Comput., 2011

2010

An Efficient Pipelined Architecture for Fast Competitive Learning.

Hui-Ya Li, Chia-Lung Hung, Wen-Jyi Hwang

Proceedings of the Algorithms and Architectures for Parallel Processing, 2010

Hardware Implementation of k-Winner-Take-All Neural Network with On-chip Learning.

Hui-Ya Li, Chien-Min Ou, Yi-Tsan Hung, Wen-Jyi Hwang, Chia-Lung Hung

Proceedings of the 13th IEEE International Conference on Computational Science and Engineering, 2010

2009

Efficient K-Means VLSI Architecture for Vector Quantization.

Hui-Ya Li, Wen-Jyi Hwang, Chih-Chieh Hsu, Chia-Lung Hung

Proceedings of the Image Analysis, 16th Scandinavian Conference, 2009