Chiang-Hsiang Liao

According to our database, Chiang-Hsiang Liao authored at least 2 papers between 2014 and 2016.

Collaborative distances:

• Dijkstra number of six.
• Erdős number of five.

2016

A Leakage Compensation Design for Low Supply Voltage SRAM.

Chua-Chin Wang, Deng-Shian Wang, Chiang-Hsiang Liao, Sih-Yu Chen

IEEE Trans. Very Large Scale Integr. Syst., 2016

2014

A single-ended disturb-free 5T loadless SRAM with leakage sensor and read delay compensation using 40 nm CMOS process.

Chua-Chin Wang, Chiang-Hsiang Liao, Sih-Yu Chen

Proceedings of the IEEE International Symposium on Circuits and Systemss, 2014