Chien-Wei Lo

According to our database, Chien-Wei Lo authored at least 3 papers between 2012 and 2017.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of five.

2017

Recent Advances in Low Power Asynchronous Circuit Design.

Jia Di, Brent A. Bell, William Bouillon, John Brady, Thao Le, Chien-Wei Lo, Liang Men, Spencer Nelson, Francis Sabado, Andrew Suchanek

J. Low Power Electron., 2017

2014

A comparative analysis of 3D-IC partitioning schemes for asynchronous circuits.

Landon Caley, Chien-Wei Lo, Francis Sabado, Jia Di

Proceedings of the 2014 IEEE International Conference on IC Design & Technology, 2014

2012

A cycle-level SIMT-GPU simulation framework.

Po-Han Wang, Chien-Wei Lo, Chia-Lin Yang, Yu-Jung Cheng

Proceedings of the 2012 IEEE International Symposium on Performance Analysis of Systems & Software, 2012