Jia Di

According to our database, Jia Di authored at least 66 papers between 2003 and 2023.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2023

Case Study for Skewing MTNCL Circuits.

Cole Sherrill, Kyle Orman, Nicholas Brown, Jia Di

Proceedings of the 28th IEEE International Symposium on Asynchronous Circuits and Systems, 2023

An Internet of Things Testbed for Education and Community Research.

John Swaim, Chad Workman, Jia Di, Xiaojiang Du

Proceedings of the IEEE International Conference on Artificial Intelligence, 2023

2022

Use It-No Need to Shake It!: Accurate Implicit Authentication for Everyday Objects with Smart Sensing.

Chuxiong Wu, Xiaopeng Li, Fei Zuo, Lannan Luo, Xiaojiang Du, Jia Di, Qiang Zeng

Proc. ACM Interact. Mob. Wearable Ubiquitous Technol., 2022

Built-In Self-Test for Multi-Threshold NULL Convention Logic Asynchronous Circuits using Pipeline Stage Parallelism.

Brett Sparkman, Scott C. Smith, Jia Di

J. Electron. Test., 2022

Using dummy data for RFID tag and reader authentication.

Baha' A. Alsaify, Dale R. Thompson, Abdallah Y. Alma'aitah, Jia Di

Digit. Commun. Networks, 2022

2021

Building Fast and Compact Sketches for Approximately Multi-Set Multi-Membership Querying.

Rundong Li, Pinghui Wang, Jiongli Zhu, Junzhou Zhao, Jia Di, Xiaofei Yang, Kai Ye

Proceedings of the SIGMOD '21: International Conference on Management of Data, 2021

Character Reassignment for Hardware Trojan Detection.

Noah Waller, Hunter Nauman, Derek Taylor, Rafael Del Carmen, Jia Di

Proceedings of the 64th IEEE International Midwest Symposium on Circuits and Systems, 2021

Rapid Configuration of Asynchronous Recurrent Neural Networks for ASIC Implementations.

Spencer Nelson, Wassim Khalil, SangYun Kim, Jia Di, Zhe Zhou, Zhihang Yuan, Guang-Yu Sun

Proceedings of the 2021 IEEE High Performance Extreme Computing Conference, 2021

Design of Asynchronous Polymorphic Logic Gates for Hardware Security.

Chandler Bernard, William Bryant, Richard Becker, Jia Di

Proceedings of the 2021 IEEE High Performance Extreme Computing Conference, 2021

Reconfigurable ASIC Implementation of Asynchronous Recurrent Neural Networks.

Spencer Nelson, Sang Yun Kim, Jia Di, Zhe Zhou, Zhihang Yuan, Guangyu Sun

Proceedings of the 27th IEEE International Symposium on Asynchronous Circuits and Systems, 2021

2020

Fork Path: Batching ORAM Requests to Remove Redundant Memory Accesses.

Jingchen Zhu, Guangyu Sun, Xian Zhang, Chao Zhang, Weiqi Zhang, Yun Liang, Tao Wang, Yiran Chen, Jia Di

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2020

Built-In Self-Test for Multi-Threshold NULL Convention Logic Asynchronous Circuits.

Brett Sparkman, Scott C. Smith, Jia Di

Proceedings of the 38th IEEE VLSI Test Symposium, 2020

Reducing Power Consumption in Asynchronous MTNCL Circuits through Selective Sleep.

Cole Sherrill, Michael Tennant, Jia Di

Proceedings of the 63rd IEEE International Midwest Symposium on Circuits and Systems, 2020

A Weak Asynchronous RESet (ARES) PUF Using Start-up Characteristics of Null Conventional Logic Gates.

Sreeja Chowdhury, Rabin Yu Acharya, William Boullion, Andrew Felder, Mark Howard, Jia Di, Domenic Forte

Proceedings of the IEEE International Test Conference, 2020

Wireless Sensor Node Platform for In-Plant Stress Monitoring.

Affan Abbasi, Marvin W. Suggs, Logan Walz, Asma Mahar, Ayesha Hassan, Robert C. Murphree, Sajib Roy, Trenton L. Roberts, Jia Di, H. Alan Mantooth

Proceedings of the 2020 IEEE Sensors, Rotterdam, The Netherlands, October 25-28, 2020, 2020

2019

Hardware IP Classification through Weighted Characteristics.

Brendan McGeehan, Flora Smith, Thao Le, Hunter Nauman, Jia Di

Proceedings of the 2019 IEEE High Performance Extreme Computing Conference, 2019

2018

Clockless Spintronic Logic: A Robust and Ultra-Low Power Computing Paradigm.

Yu Bai, Ronald F. DeMara, Jia Di, Mingjie Lin

IEEE Trans. Computers, 2018

The Old Frontier of Reverse Engineering: Netlist Partitioning.

Travis Meade, Kaveh Shamsi, Thao Le, Jia Di, Shaojie Zhang, Yier Jin

J. Hardw. Syst. Secur., 2018

Comprehensive Comparison of NULL Convention Logic Threshold Gate Implementations.

Kelby Haulmark, Wassim Khalil, William Bouillon, Jia Di

Proceedings of the 2018 New Generation of CAS, 2018

Hardware Trojan Detection and Functionality Determination for Soft IPs.

Thao Le, Lucas Weaver, Jia Di, Shaojie Zhang, Yier Jin

Proceedings of the 3rd IEEE International Verification and Security Workshop, 2018

2017

Obfuscation-Based Protection Framework against Printed Circuit Boards Unauthorized Operation and Reverse Engineering.

Zimu Guo, Jia Di, Mark M. Tehranipoor, Domenic Forte

ACM Trans. Design Autom. Electr. Syst., 2017

A SiC CMOS Digitally Controlled PWM Generator for High-Temperature Applications.

Sajib Roy, Robert C. Murphree, Affan Abbasi, Ashfaqur Rahman, Shamim Ahmed, James Austin Gattis, Matt Francis, Jim Holmes, H. Alan Mantooth, Jia Di

IEEE Trans. Ind. Electron., 2017

Recent Advances in Low Power Asynchronous Circuit Design.

Jia Di, Brent A. Bell, William Bouillon, John Brady, Thao Le, Chien-Wei Lo, Liang Men, Spencer Nelson, Francis Sabado, Andrew Suchanek

J. Low Power Electron., 2017

Golden reference matching for gate-level netlist functionality identification.

Thao Le, Jia Di

Proceedings of the IEEE 60th International Midwest Symposium on Circuits and Systems, 2017

2016

Multi-threshold dual-spacer dual-rail delay-insensitive logic: An improved IC design methodology for side channel attack mitigation.

Jean Pierre T. Habimana, Francis Sabado, Jia Di

Proceedings of the IEEE International Symposium on Circuits and Systems, 2016

Tracking Data Flow at Gate-Level through Structural Checking.

Thao Le, Jia Di, Mark M. Tehranipoor, Domenic Forte, Lei Wang

Proceedings of the 26th edition on Great Lakes Symposium on VLSI, 2016

A novel PUF based on cell error rate distribution of STT-RAM.

Xian Zhang, Guangyu Sun, Yaojun Zhang, Yiran Chen, Hai Li, Wujie Wen, Jia Di

Proceedings of the 21st Asia and South Pacific Design Automation Conference, 2016

2015

Evaluating the capability and performance of access control policy verification tools.

Ang Li, Qinghua Li, Vincent C. Hu, Jia Di

Proceedings of the 34th IEEE Military Communications Conference, 2015

Fork path: improving efficiency of ORAM by removing redundant memory accesses.

Xian Zhang, Guangyu Sun, Chao Zhang, Weiqi Zhang, Yun Liang, Tao Wang, Yiran Chen, Jia Di

Proceedings of the 48th International Symposium on Microarchitecture, 2015

The effects of flooding attacks on time-critical communications in the smart grid.

Qinghua Li, Chase Ross, Jing Yang, Jia Di, Juan Carlos Balda, H. Alan Mantooth

Proceedings of the 2015 IEEE Power & Energy Society Innovative Smart Grid Technologies Conference, 2015

Chip-level anti-reverse engineering using transformable interconnects.

Shuai Chen, Junlin Chen, Domenic Forte, Jia Di, Mark M. Tehranipoor, Lei Wang

Proceedings of the 2015 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, 2015

Investigation of obfuscation-based anti-reverse engineering for printed circuit boards.

Zimu Guo, Mark M. Tehranipoor, Domenic Forte, Jia Di

Proceedings of the 52nd Annual Design Automation Conference, 2015

2014

Teaching RFID Information Systems Security.

Dale R. Thompson, Jia Di, Michael K. Daugherty

IEEE Trans. Educ., 2014

Asynchronous Parallel Platforms with Balanced Performance and Energy.

Liang Men, Jia Di

J. Low Power Electron., 2014

Exploiting hidden Markov models in identifying passive UHF RFID tags.

Baha' A. Alsaify, Dale R. Thompson, Jia Di

Proceedings of the 2014 IEEE Radio and Wireless Symposium, 2014

Framework of a scalable delay-insensitive asynchronous platform enabling heterogeneous concurrency.

Liang Men, Jia Di

Proceedings of the IEEE 57th International Midwest Symposium on Circuits and Systems, 2014

An asynchronous finite impulse response filter design for Digital Signal Processing circuit.

Liang Men, Jia Di

Proceedings of the IEEE 57th International Midwest Symposium on Circuits and Systems, 2014

Framework of an Adaptive Delay-Insensitive Asynchronous Platform for Energy Efficiency.

Liang Men, Brent Hollosi, Jia Di

Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2014

A comparative analysis of 3D-IC partitioning schemes for asynchronous circuits.

Landon Caley, Chien-Wei Lo, Francis Sabado, Jia Di

Proceedings of the 2014 IEEE International Conference on IC Design & Technology, 2014

2013

Mitigating power- and timing-based side-channel attacks using dual-spacer dual-rail delay-insensitive asynchronous logic.

Washington Cilio, Michael Linder, Chris Porter, Jia Di, Dale R. Thompson, Scott C. Smith

Microelectron. J., 2013

An Asynchronous Advanced Encryption Standard Core Design for Energy Efficiency.

Michael Hinds, Brett Sparkman, Jia Di, Scott C. Smith

J. Low Power Electron., 2013

An efficient run-time encryption scheme for non-volatile main memory.

Xian Zhang, Chao Zhang, Guangyu Sun, Jia Di, Tao Zhang

Proceedings of the International Conference on Compilers, 2013

2012

Feature selection for RFID tag identification.

Debrup Banerjee, Jiang Li, Jia Di, Dale R. Thompson

Proceedings of the 7th International Conference on Communications and Networking in China, 2012

2011

Fingerprinting RFID Tags.

Senthilkumar Chinnappa Gounder Periaswamy, Dale R. Thompson, Jia Di

IEEE Trans. Dependable Secur. Comput., 2011

A 12-bit CMOS current steering D/A converter with a fully differential voltage output.

Guoyuan Fu, H. Alan Mantooth, Jia Di

Proceedings of the 12th International Symposium on Quality Electronic Design, 2011

A new topology for fully differential amplifiers that enhances their tolerance to external disturbances.

Guoyuan Fu, H. Alan Mantooth, Jia Di

Proceedings of the 2011 IEEE 9th International Conference on ASIC, 2011

2010

Integrating Asynchronous Digital Design Into the Computer Engineering Curriculum.

Scott C. Smith, Waleed K. Al-Assadi, Jia Di

IEEE Trans. Educ., 2010

Analysis and Improvement of Delay-Insensitive Asynchronous Circuits Operating in Subthreshold Regime.

David Coleman, Jia Di

J. Low Power Electron., 2010

Delay-Insensitive Cell Matrix.

Scott C. Smith, David Roclin, Jia Di

Proceedings of the 2010 International Conference on Computer Design, 2010

2009

Designing Asynchronous Circuits using NULL Convention Logic (NCL)

Scott C. Smith, Jia Di

Synthesis Lectures on Digital Circuits and Systems, Morgan & Claypool Publishers, ISBN: 978-3-031-79800-9, 2009

Glitch-free design for multi-threshold CMOS NCL circuits.

Ahmad Al Zahrani, Andrew Bailey, Guoyuan Fu, Jia Di

Proceedings of the 19th ACM Great Lakes Symposium on VLSI 2009, 2009

Delay-Insensitive Ternary Logic.

Ravi Sankar Parameswaran Nair, Scott C. Smith, Jia Di

Proceedings of the 2009 International Conference on Computer Design, 2009

Investigation and comparison of thermal distribution in synchronous and asynchronous 3D ICs.

Brent Hollosi, Tao Zhang, Ravi Sankar Parameswaran Nair, Yuan Xie, Jia Di, Scott C. Smith

Proceedings of the IEEE International Conference on 3D System Integration, 2009

2008

Multi-Threshold Asynchronous Circuit Design for Ultra-Low Power.

Andrew Bailey, Ahmad Al Zahrani, Guoyuan Fu, Jia Di, Scott C. Smith

J. Low Power Electron., 2008

Ownership Transfer of RFID Tags based on Electronic Fingerprint.

Senthilkumar Chinnappa Gounder Periaswamy, Dale R. Thompson, Jia Di

Proceedings of the 2008 International Conference on Security & Management, 2008

2007

Cellular Array-based Delay-insensitive Asynchronous Circuits Design and Test for Nanocomputing Systems.

Jia Di, Parag K. Lala

J. Electron. Test., 2007

2006

Reversible-logic design with online testability.

Dilip P. Vasudevan, Parag K. Lala, Jia Di, James Patrick Parkerson

IEEE Trans. Instrum. Meas., 2006

Energy-Aware Dual-Rail Bit-Wise Completion Pipelined Arithmetic Circuit Design.

Jia Di, Jiann-Shiun Yuan

J. Low Power Electron., 2006

Improving power-awareness of pipelined array multipliers using two-dimensional pipeline gating and its application on FIR design.

Jia Di, Jiann-Shiun Yuan, Ronald F. DeMara

Integr., 2006

Synthesis of Nanoelectronic Circuits on Delay-Insensitive Cellular Arrays.

Jia Di, Dilip P. Vasudevan

Proceedings of the Third IEEE International Workshop on Electronic Design, 2006

2005

Teaching low-power electronic design in electrical and computer engineering.

Jiann-Shiun Yuan, Jia Di

IEEE Trans. Educ., 2005

D3L - A framework on fighting against non-invasive attacks to integrated circuits for security applications.

Jia Di, Fengwei Yang

Proceedings of the Third IASTED International Conference on Circuits, 2005

On the Effect of Stuck-at Faults on Delay-insensitive Nanoscale Circuits.

Jia Di, Parag K. Lala, Dilip P. Vasudevan

Proceedings of the 20th IEEE International Symposium on Defect and Fault-Tolerance in VLSI Systems (DFT 2005), 2005

Dynamic Active-bit Detection and Operands Exchange for Designing Energy-aware Asynchronous Multipliers.

Jiann-Shiun Yuan, Jia Di

Proceedings of the 2005 International Conference on Computer Design, 2005

2003

High Throughput Power-Aware FIR Filter Design Based on Fine-Grain Pipelining Multipliers and Adders.

Jia Di, Jiann-Shiun Yuan, Ronald F. DeMara

Proceedings of the 2003 IEEE Computer Society Annual Symposium on VLSI (ISVLSI 2003), 2003

Power-aware pipelined multiplier design based on 2-dimensional pipeline gating.

Jia Di, Jiann-Shiun Yuan

Proceedings of the 13th ACM Great Lakes Symposium on VLSI 2003, 2003