Chinnaiyan Senthilpari
Orcid: 0000-0002-3775-5621
According to our database1,
Chinnaiyan Senthilpari
authored at least 14 papers
between 2008 and 2022.
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Bibliography
2022
Test power and area optimized logic built-in self-test with higher fault coverage for automobile SoCs.
Microelectron. J., 2022
2021
A Low-Power and Area-Efficient Design of a Weighted Pseudorandom Test-Pattern Generator for a Test-Per-Scan Built-in Self-Test Architecture.
IEEE Access, 2021
2018
Computer Aided Automatic Detection and Classification of EEG Signals for Screening Epilepsy Disorder.
J. Inf. Sci. Eng., 2018
2016
Classification of focal and nonfocal EEG signals using ANFIS classifier for epilepsy detection.
Int. J. Imaging Syst. Technol., 2016
2013
Performance Analysis of Reversed Binary Decision Diagram Pass Transistor Logic Synthesis.
Int. J. Circuit Theory Appl., 2013
2012
IEICE Electron. Express, 2012
A new 6-T multiplexer based full-adder for low power and leakage current optimization.
IEICE Electron. Express, 2012
2011
Microelectron. J., 2011
2009
Low Power, Low Latency, High Throughput 16-Bit CSA Adder Using Nonclocked Pass-Transistor Logic.
J. Circuits Syst. Comput., 2009
Vector quantized signal dependant Delta-Sigma modulator based high performance three-phase switching converter.
IEICE Electron. Express, 2009
Proceedings of the First International Conference on Computational Intelligence, 2009
2008
Design of a low-power, high performance, 8×8 bit multiplier using a Shannon-based adder cell.
Microelectron. J., 2008
IEICE Electron. Express, 2008