Christopher Pulte

Orcid: 0000-0002-7369-183X

According to our database1, Christopher Pulte authored at least 13 papers between 2015 and 2023.

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Bibliography

2023
CN: Verifying Systems C Code with Separation-Logic Refinement Types.
Proc. ACM Program. Lang., January, 2023

2022
Relaxed virtual memory in Armv8-A (extended version).
CoRR, 2022

Relaxed virtual memory in Armv8-A.
Proceedings of the Programming Languages and Systems, 2022

2021
Isla: Integrating Full-Scale ISA Semantics and Axiomatic Concurrency Models.
Proceedings of the Computer Aided Verification - 33rd International Conference, 2021

2020
Repairing and mechanising the JavaScript relaxed memory model.
Proceedings of the 41st ACM SIGPLAN International Conference on Programming Language Design and Implementation, 2020

ARMv8-A System Semantics: Instruction Fetch in Relaxed Architectures.
Proceedings of the Programming Languages and Systems, 2020

2019
The semantics of multicopy atomic ARMv8 and RISC-V
PhD thesis, 2019

ISA semantics for ARMv8-a, RISC-v, and CHERI-MIPS.
Proc. ACM Program. Lang., 2019

Promising-ARM/RISC-V: a simpler and faster operational concurrency model.
Proceedings of the 40th ACM SIGPLAN Conference on Programming Language Design and Implementation, 2019

2018
Simplifying ARM concurrency: multicopy-atomic axiomatic and operational models for ARMv8.
Proc. ACM Program. Lang., 2018

2017
Mixed-size concurrency: ARM, POWER, C/C++11, and SC.
Proceedings of the 44th ACM SIGPLAN Symposium on Principles of Programming Languages, 2017

2016
Modelling the ARMv8 architecture, operationally: concurrency and ISA.
Proceedings of the 43rd Annual ACM SIGPLAN-SIGACT Symposium on Principles of Programming Languages, 2016

2015
An integrated concurrency and core-ISA architectural envelope definition, and test oracle, for IBM POWER multiprocessors.
Proceedings of the 48th International Symposium on Microarchitecture, 2015


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