Robert M. Norton

According to our database1, Robert M. Norton authored at least 9 papers between 2014 and 2020.

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Bibliography

2020
Rigorous engineering for hardware security: Formal modelling and proof in the CHERI design and implementation process.
Proceedings of the 2020 IEEE Symposium on Security and Privacy, 2020


2019
CHERI Concentrate: Practical Compressed Capabilities.
IEEE Trans. Computers, 2019

ISA semantics for ARMv8-a, RISC-v, and CHERI-MIPS.
Proc. ACM Program. Lang., 2019

CheriABI: Enforcing Valid Pointer Provenance and Minimizing Pointer Privilege in the POSIX C Run-time Environment.
Proceedings of the Twenty-Fourth International Conference on Architectural Support for Programming Languages and Operating Systems, 2019

2017
CHERI JNI: Sinking the Java Security Model into the C.
Proceedings of the Twenty-Second International Conference on Architectural Support for Programming Languages and Operating Systems, 2017

2016
Fast Protection-Domain Crossing in the CHERI Capability-System Architecture.
IEEE Micro, 2016

2015
CHERI: A Hybrid Capability-System Architecture for Scalable Software Compartmentalization.
Proceedings of the 2015 IEEE Symposium on Security and Privacy, 2015

2014
The CHERI capability model: Revisiting RISC in an age of risk.
Proceedings of the ACM/IEEE 41st International Symposium on Computer Architecture, 2014


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