Chun-hong Chen

According to our database, Chun-hong Chen authored at least 2 papers between 1998 and 1999.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of five.

1999

Timing Optimization of Logic Network Using Gate Duplication.

Chun-hong Chen, Chi-Ying Tsui

Proceedings of the 1999 Conference on Asia South Pacific Design Automation, 1999

1998

Towards the capability of providing power-area-delay trade-off at the register transfer level.

Chun-hong Chen, Chi-Ying Tsui

Proceedings of the 1998 International Symposium on Low Power Electronics and Design, 1998