Chung-Yi Wang

According to our database, Chung-Yi Wang authored at least 6 papers between 2006 and 2011.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of five.

2011

A CMOS 6-Bit 16-GS/s Time-Interleaved ADC Using Digital Background Calibration Techniques.

Chun-Cheng Huang, Chung-Yi Wang, Jieh-Tsorng Wu

IEEE J. Solid State Circuits, 2011

2009

A Multiphase Timing-Skew Calibration Technique Using Zero-Crossing Detection.

Chung-Yi Wang, Jieh-Tsorng Wu

IEEE Trans. Circuits Syst. I Regul. Pap., 2009

2008

Interactive Mining of Frequent Patterns in a Data Stream of Time-Fading Models.

Ming-Yen Lin, Sue-Chen Hsueh, Chung-Yi Wang

Proceedings of the Eighth International Conference on Intelligent Systems Design and Applications, 2008

2007

A Robust and Fast Digital Background Calibration Technique for Pipelined ADCs.

Jen-Lin Fan, Chung-Yi Wang, Jieh-Tsorng Wu

IEEE Trans. Circuits Syst. I Regul. Pap., 2007

Information Hiding in Real-Time VoIP Streams.

Chung-Yi Wang, Quincy Wu

Proceedings of the Ninth IEEE International Symposium on Multimedia, 2007

2006

A background timing-skew calibration technique for time-interleaved analog-to-digital converters.

Chung-Yi Wang, Jieh-Tsorng Wu

IEEE Trans. Circuits Syst. II Express Briefs, 2006