Ping-Hsuan Hsieh

According to our database1, Ping-Hsuan Hsieh authored at least 31 papers between 2003 and 2022.

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Bibliography

2022
Loop Dynamics Analysis of PAM-4 Mueller-Muller Clock and Data Recovery System.
IEEE Open J. Circuits Syst., 2022

Introduction to the Special Section on Smart Imaging.
IEEE Open J. Circuits Syst., 2022

2021
Introduction to the Special Section on High-Speed Wireline and Optical Communication Circuits and Systems.
IEEE Open J. Circuits Syst., 2021

Introduction to the Special Issue on the 2020 IEEE International Solid-State Circuits Conference (ISSCC).
IEEE J. Solid State Circuits, 2021

Session 29 Overview: Digital Circuits for Computing, Clocking and Power Management DIGITAL CIRCUITS SUBCOMMITTEE.
Proceedings of the IEEE International Solid-State Circuits Conference, 2021

F3: Silicon Technologies in the Fight Against Pandemics - From Point of Care to Computational Epidemiology.
Proceedings of the IEEE International Solid-State Circuits Conference, 2021

A Cross-Correlation-Based Time-of-Flight Design for Chaos Lidar Systems.
Proceedings of the IEEE Asian Solid-State Circuits Conference, 2021

2020
A Calibration Technique for P-SSHI-Phi Interface for Piezoelectric Energy Harvesting.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2020

A 13.56-MHz Wireless Power Transfer Transmitter with Impedance Compression Network for Biomedical Applications.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2020

2019
A Digital-to-Time Converter with Coupled Phase-Rotating LC Oscillators in 90-nm CMOS Technology.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2019

Design and Implementation of a Memristor-Based Oscillator.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2019

2018
Electromagnetic Energy Harvester Interface Design for Wearable Applications.
IEEE Trans. Circuits Syst. II Express Briefs, 2018

2017
Integration of energy-recycling logic and wireless power transfer for ultra-low-power implantables.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2017

2016
A Standard-Cell-Design-Flow Compatible Energy-Recycling Logic With 70% Energy Saving.
IEEE Trans. Circuits Syst. I Regul. Pap., 2016


A series-SSHI-Phi interface circuit for piezoelectric energy harvesting with 163% improvement in extracted power at off-resonance.
Proceedings of the IEEE Asian Solid-State Circuits Conference, 2016

2015
An RF Energy Harvester With 44.1% PCE at Input Available Power of -12 dBm.
IEEE Trans. Circuits Syst. I Regul. Pap., 2015

A 0.003 mm<sup>2</sup> 10 b 240 MS/s 0.7 mW SAR ADC in 28 nm CMOS With Digital Error Correction and Correlated-Reversed Switching.
IEEE J. Solid State Circuits, 2015

A 1.4 pJ/bit, Power-Scalable 16×12 Gb/s Source-Synchronous I/O With DFE Receiver in 32 nm SOI CMOS Technology.
IEEE J. Solid State Circuits, 2015

A 100-MHz radio-frequency energy harvester for passively powered devices.
Proceedings of the European Conference on Circuit Theory and Design, 2015

2014
28.3 A frequency-defined vernier digital-to-time converter for impulse radar systems in 65nm CMOS.
Proceedings of the 2014 IEEE International Conference on Solid-State Circuits Conference, 2014

A 1.4-pJ/b, power-scalable 16×12-Gb/s source-synchronous I/O with DFE receiver in 32nm SOI CMOS technology.
Proceedings of the IEEE 2014 Custom Integrated Circuits Conference, 2014

2013
A 0.1pJ/b 5-to-10Gb/s charge-recycling stacked low-power I/O for on-chip signaling in 45nm CMOS SOI.
Proceedings of the 2013 IEEE International Solid-State Circuits Conference, 2013

2012
A 28-Gb/s 4-Tap FFE/15-Tap DFE Serial Link Transceiver in 32-nm SOI CMOS Technology.
IEEE J. Solid State Circuits, 2012


2010
A Phase-Selecting Digital Phase-Locked Loop With Bandwidth Tracking in 65-nm CMOS Technology.
IEEE J. Solid State Circuits, 2010

2009
Minimizing the Supply Sensitivity of a CMOS Ring Oscillator Through Jointly Biasing the Supply and Control Voltages.
IEEE J. Solid State Circuits, 2009

A nonlinear phase detector for digital phase locked loops.
Proceedings of the IEEE Custom Integrated Circuits Conference, 2009

2008
Minimizing the supply sensitivity of CMOS ring oscillator by jointly biasing the supply and control voltage.
Proceedings of the IEEE 2008 Custom Integrated Circuits Conference, 2008

2007
Technique to Reduce the Resolution Requirement of Digitally Controlled Oscillators for Digital PLLs.
IEEE Trans. Circuits Syst. II Express Briefs, 2007

2003
CMOS LC oscillator using variable mean frequency.
Proceedings of the IEEE Custom Integrated Circuits Conference, 2003


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