Dam Minh Tung
Orcid: 0000-0003-3927-9865
According to our database1,
Dam Minh Tung
authored at least 9 papers
between 2017 and 2020.
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Bibliography
2020
In-Situ Timing Error Predictor-Based Two-Cycle Adaptive Frequency Scaling System on an FPGA.
J. Circuits Syst. Comput., 2020
2019
A Carry Chain-Based ADMFC Design on an FPGA for EMI Reduction and Noise Compensation.
J. Circuits Syst. Comput., 2019
A GALS design based on multi-frequency clocking for digital switching noise reduction.
Integr., 2019
A high-resolution and glitch-free all-digital variable length ring oscillator design on an FPGA.
Comput. Electr. Eng., 2019
2018
Analysis of Clock Scheduling in Frequency Domain for Digital Switching Noise Suppressions.
IEEE Trans. Very Large Scale Integr. Syst., 2018
A GALS Design with Opposite-Phase Local Clock Assignment for Power Supply Noise Reduction.
Proceedings of the 2018 IEEE Asia Pacific Conference on Circuits and Systems, 2018
2017
Proceedings of the IEEE 60th International Midwest Symposium on Circuits and Systems, 2017
Proceedings of the IEEE International Instrumentation and Measurement Technology Conference, 2017