Dan Stiurca

According to our database1, Dan Stiurca authored at least 4 papers between 1994 and 2005.

Collaborative distances:
  • Dijkstra number2 of six.
  • Erdős number3 of five.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
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Links

On csauthors.net:

Bibliography

2005
A fully differential line driver with on-chip calibrated source termination for gigabit and fast Ethernet in a standard 0.13µ CMOS process.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2005), 2005

2001
A low-jitter 125-1250-MHz process-independent and ripple-poleless 0.18-μm CMOS PLL based on a sample-reset loop filter.
IEEE J. Solid State Circuits, 2001

Sample-reset loop filter architecture for process independent and ripple-pole-less low jitter CMOS charge-pump PLLs.
Proceedings of the 2001 International Symposium on Circuits and Systems, 2001

1994
Systematic Generation of Current-Mode Second Order RC Oscillators.
Proceedings of the 1994 IEEE International Symposium on Circuits and Systems, ISCAS 1994, London, England, UK, May 30, 1994


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