Daniel Dietsch

Orcid: 0000-0002-8947-5373

According to our database1, Daniel Dietsch authored at least 42 papers between 2011 and 2024.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

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In proceedings 
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PhD thesis 
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Links

On csauthors.net:

Bibliography

2024
Ultimate Automizer and the Abstraction of Bitwise Operations - (Competition Contribution).
Proceedings of the Tools and Algorithms for the Construction and Analysis of Systems, 2024

Ultimate TestGen: Test-Case Generation with Automata-based Software Model Checking (Competition Contribution).
Proceedings of the Fundamental Approaches to Software Engineering, 2024

2023
Ultimate Automizer and the CommuHash Normal Form - (Competition Contribution).
Proceedings of the Tools and Algorithms for the Construction and Analysis of Systems, 2023

Ultimate Taipan and Race Detection in Ultimate - (Competition Contribution).
Proceedings of the Tools and Algorithms for the Construction and Analysis of Systems, 2023

2022
Verification Witnesses.
ACM Trans. Softw. Eng. Methodol., 2022

Ultimate GemCutter and the Axes of Generalization - (Competition Contribution).
Proceedings of the Tools and Algorithms for the Construction and Analysis of Systems, 2022

A Software Lab with On-demand Support.
Proceedings of the 55th Hawaii International Conference on System Sciences, 2022

2021
Source-Level Bitwise Branching for Temporal Verification of Lifted Binaries.
CoRR, 2021

Verification of Concurrent Programs Using Petri Net Unfoldings.
Proceedings of the Verification, Model Checking, and Abstract Interpretation, 2021

Hanfor: Semantic Requirements Review at Scale.
Proceedings of the Joint Proceedings of REFSQ 2021 Workshops, 2021

Separating Map Variables in a Logic-Based Intermediate Verification Language.
Proceedings of the Networked Systems - 9th International Conference, 2021

Proving LTL Properties of Bitvector Programs and Decompiled Binaries.
Proceedings of the Programming Languages and Systems - 19th Asian Symposium, 2021

2020
Ultimate Taipan with Symbolic Interpretation and Fluid Abstractions - (Competition Contribution).
Proceedings of the Tools and Algorithms for the Construction and Analysis of Systems, 2020

2019
Ultimate TreeAutomizer (CHC-COMP Tool Description).
Proceedings of the Sixth Workshop on Horn Clauses for Verification and Synthesis and Third Workshop on Program Equivalence and Relational Reasoning, 2019

Different Maps for Different Uses. A Program Transformation for Intermediate Verification Languages.
CoRR, 2019

Scalable Analysis of Real-Time Requirements.
Proceedings of the 27th IEEE International Requirements Engineering Conference, 2019

2018
The Map Equality Domain.
Proceedings of the Verified Software. Theories, Tools, and Experiments, 2018

Ultimate Automizer and the Search for Perfect Interpolants - (Competition Contribution).
Proceedings of the Tools and Algorithms for the Construction and Analysis of Systems, 2018

Ultimate Taipan with Dynamic Block Encoding - (Competition Contribution).
Proceedings of the Tools and Algorithms for the Construction and Analysis of Systems, 2018

Incremental Verification Using Trace Abstraction.
Proceedings of the Static Analysis - 25th International Symposium, 2018

2017
Refining Trace Abstraction using Abstract Interpretation.
CoRR, 2017

Ultimate Automizer with an On-Demand Construction of Floyd-Hoare Automata - (Competition Contribution).
Proceedings of the Tools and Algorithms for the Construction and Analysis of Systems, 2017

Ultimate Taipan: Trace Abstraction and Abstract Interpretation - (Competition Contribution).
Proceedings of the Tools and Algorithms for the Construction and Analysis of Systems, 2017

Craig vs. Newton in software model checking.
Proceedings of the 2017 11th Joint Meeting on Foundations of Software Engineering, 2017

Exchanging Verification Witnesses between Verifiers.
Proceedings of the Software Engineering 2017, 2017

Loop Invariants from Counterexamples.
Proceedings of the Static Analysis - 24th International Symposium, 2017

2016
Automated verification of system requirements and software specifications.
PhD thesis, 2016

Ready for testing: ensuring conformance to industrial standards through formal verification.
Formal Aspects Comput., 2016

Ultimate Automizer with Two-track Proofs - (Competition Contribution).
Proceedings of the Tools and Algorithms for the Construction and Analysis of Systems, 2016

Correctness witnesses: exchanging verification results between verifiers.
Proceedings of the 24th ACM SIGSOFT International Symposium on Foundations of Software Engineering, 2016

Witness validation and stepwise testification across software verifiers.
Proceedings of the Software Engineering 2016, 2016

2015
ULTIMATE KOJAK with Memory Safety Checks - (Competition Contribution).
Proceedings of the Tools and Algorithms for the Construction and Analysis of Systems, 2015

Ultimate Automizer with Array Interpolation - (Competition Contribution).
Proceedings of the Tools and Algorithms for the Construction and Analysis of Systems, 2015

Fairness Modulo Theory: A New Approach to LTL Software Model Checking.
Proceedings of the Computer Aided Verification - 27th International Conference, 2015

2014
Ultimate Automizer with Unsatisfiable Cores - (Competition Contribution).
Proceedings of the Tools and Algorithms for the Construction and Analysis of Systems, 2014

Ultimate Kojak - (Competition Contribution).
Proceedings of the Tools and Algorithms for the Construction and Analysis of Systems, 2014

The Wireless Fire Alarm System: Ensuring Conformance to Industrial Standards through Formal Verification.
Proceedings of the FM 2014: Formal Methods, 2014

2013
Monitoring Student Activity in Collaborative Software Development
CoRR, 2013

Ultimate Automizer with SMTInterpol - (Competition Contribution).
Proceedings of the Tools and Algorithms for the Construction and Analysis of Systems, 2013

2012
Towards successful subcontracting for software in small to medium-sized enterprises.
Proceedings of the Fifth IEEE International Workshop on Requirements Engineering and Law, 2012

2011
Disambiguation of industrial standards through formalization and graphical languages.
Proceedings of the RE 2011, 19th IEEE International Requirements Engineering Conference, Trento, Italy, August 29 2011, 2011

System Verification through Program Verification.
Proceedings of the FM 2011: Formal Methods, 2011


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