Daniel Hackenberg
Orcid: 0000-0002-8491-770X
According to our database1,
Daniel Hackenberg
authored at least 40 papers
between 2006 and 2022.
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Bibliography
2022
Proceedings of the ICPE '22: ACM/SPEC International Conference on Performance Engineering, Bejing, China, April 9, 2022
2021
Proceedings of the IEEE International Conference on Cluster Computing, 2021
Proceedings of the IEEE International Conference on Cluster Computing, 2021
2019
Power measurement techniques for energy-efficient computing: reconciling scalability, resolution, and accuracy.
SICS Softw.-Intensive Cyber Phys. Syst., 2019
Proceedings of the 3rd IEEE/ACM Industry/University Joint International Workshop on Data-center Automation, 2019
Energy Efficiency Features of the Intel Skylake-SP Processor and Their Impact on Performance.
Proceedings of the 17th International Conference on High Performance Computing & Simulation, 2019
2017
Proceedings of the 8th ACM/SPEC on International Conference on Performance Engineering, 2017
Towards fine-grained dynamic tuning of HPC applications on modern multi-core architectures.
Proceedings of the International Conference for High Performance Computing, 2017
Powernightmares: The Challenge of Efficiently Using Sleep States on Multi-core Systems.
Proceedings of the Euro-Par 2017: Parallel Processing Workshops, 2017
Proceedings of the 2017 IEEE International Conference on Cluster Computing, 2017
2016
The shift from processor power consumption to performance variations: fundamental implications at scale.
Comput. Sci. Res. Dev., 2016
Software Controlled Clock Modulation for Energy Efficiency Optimization on Intel Processors.
Proceedings of the 4th International Workshop on Energy Efficient Supercomputing, 2016
2015
Node variability in large-scale power measurements: perspectives from the Green500, Top500 and EEHPCWG.
Proceedings of the International Conference for High Performance Computing, 2015
Proceedings of the 2015 IEEE International Parallel and Distributed Processing Symposium Workshop, 2015
Cache Coherence Protocol and Memory Performance of the Intel Haswell-EP Architecture.
Proceedings of the 44th International Conference on Parallel Processing, 2015
Power measurements for compute nodes: Improving sampling rates, granularity and accuracy.
Proceedings of the Sixth International Green and Sustainable Computing Conference, 2015
Proceedings of the 21st Americas Conference on Information Systems, 2015
2014
Proceedings of the 2nd International Workshop on Energy Efficient Supercomputing, 2014
Proceedings of the workshop on Memory Systems Performance and Correctness, 2014
Proceedings of the Euro-Par 2014: Parallel Processing Workshops, 2014
2013
Proceedings of the 2012 IEEE International Symposium on Performance Analysis of Systems & Software, 2013
Proceedings of the International Green Computing Conference, 2013
2012
Collecting Distributed Performance Data with Dataheap: Generating and Exploiting a Holistic System View.
Proceedings of the International Conference on Computational Science, 2012
Comput. Sci. Res. Dev., 2012
Performance analysis of multi-level parallelism: inter-node, intra-node and hardware accelerators.
Concurr. Comput. Pract. Exp., 2012
Memory Performance at Reduced CPU Clock Speeds: An Analysis of Current x86_64 Processors.
Proceedings of the 2012 Workshop on Power-Aware Computing Systems, HotPower'12, 2012
Proceedings of the OpenMP in a Heterogeneous World - 8th International Workshop on OpenMP, 2012
2011
On-line analysis of hardware performance events for workload characterization and processor frequency scaling decisions.
Proceedings of the ICPE'11, 2011
Proceedings of the 4th Workshop on Power-Aware Computing and Systems, 2011
Proceedings of the Algorithms and Architectures for Parallel Processing, 2011
2010
Comput. Sci. Res. Dev., 2010
Characterizing the energy consumption of data transfers and arithmetic operations on x86-64 processors.
Proceedings of the International Green Computing Conference 2010, 2010
Proceedings of the Euro-Par 2010 Parallel Processing Workshops, 2010
High Resolution Program Flow Visualization of Hardware Accelerated Hybrid Multi-core Applications.
Proceedings of the 10th IEEE/ACM International Conference on Cluster, 2010
2009
Proceedings of the Tools for High Performance Computing 2009, 2009
Comparing cache architectures and coherency protocols on x86-64 multicore SMP systems.
Proceedings of the 42st Annual IEEE/ACM International Symposium on Microarchitecture (MICRO-42 2009), 2009
Memory Performance and Cache Coherency Effects on an Intel Nehalem Multiprocessor System.
Proceedings of the PACT 2009, 2009
2008
Proceedings of the Euro-Par 2008, 2008
2006
Proceedings of the Euro-Par 2006, Parallel Processing, 12th International Euro-Par Conference, Dresden, Germany, August 28, 2006