David G. Haigh

According to our database1, David G. Haigh authored at least 22 papers between 1993 and 2008.

Collaborative distances:
  • Dijkstra number2 of six.
  • Erdős number3 of five.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
Other 

Links

On csauthors.net:

Bibliography

2008
A Current-Mode Circuit With a Linearized Input <i>V/I</i> Conversion Scheme and the Realization of a 2-V/2.5-V Operational, 100-MS/s, MOS SHA.
IEEE Trans. Circuits Syst. I Regul. Pap., 2008

2007
Derivation of power amplifier predistortion circuits by frequency to signal amplitude transformation.
Proceedings of the 18th European Conference on Circuit Theory and Design, 2007

2006
Admittance Matrix Models for the Nullor Using Limit Variables and Their Application to Circuit Design.
IEEE Trans. Circuits Syst. I Regul. Pap., 2006

Symbolic Framework for Linear Active Circuits Based on Port Equivalence Using Limit Variables.
IEEE Trans. Circuits Syst. I Regul. Pap., 2006

A Method of Transformation from Symbolic Transfer Function to Active-RC Circuit by Admittance Matrix Expansion.
IEEE Trans. Circuits Syst. I Regul. Pap., 2006

A mathematical framework for active circuits based on port equivalence using limit variables.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2006), 2006

Analytic approach to or transformations for FET circuit synthesis. Part II. Nullator-norator re-pairing and cloning.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2006), 2006

Analytic approach to or transformations for FET circuit synthesis. Part I. Nullator-norator tree transformations.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2006), 2006

2005
Symbolic passive-RC circuit synthesis by admittance matrix expansion.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2005), 2005

Symbolic active-RC circuit synthesis by admittance matrix expansion.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2005), 2005

Rules for systematic synthesis of all-transistor analogue circuits by admittance matrix expansion.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2005), 2005

New admittance matrix descriptions for the nullor with application to circuit design.
Proceedings of the 2005 European Conference on Circuit Theory and Design, 2005

Systematic synthesis of operational amplifier circuits by admittance matrix expansion.
Proceedings of the 2005 European Conference on Circuit Theory and Design, 2005

2004
Systematic synthesis method for analogue circuits. Part I. Notation and synthesis toolbox.
Proceedings of the 2004 International Symposium on Circuits and Systems, 2004

1995
Novel Circuit Synthesis Technique Using Short Channel GaAs Fets Giving Reduced Intermodulation Distortion.
Proceedings of the 1995 IEEE International Symposium on Circuits and Systems, ISCAS 1995, Seattle, Washington, USA, April 30, 1995

On the Design of Active GaAs Multipliers.
Proceedings of the 1995 IEEE International Symposium on Circuits and Systems, ISCAS 1995, Seattle, Washington, USA, April 30, 1995

1994
Device Circuit Interaction in the Common Source Amplifier.
Proceedings of the 1994 IEEE International Symposium on Circuits and Systems, ISCAS 1994, London, England, UK, May 30, 1994

Distortion Compensation of Multi-Mesfet Circuits.
Proceedings of the 1994 IEEE International Symposium on Circuits and Systems, ISCAS 1994, London, England, UK, May 30, 1994

On non-Linear Multi-FET Analysis.
Proceedings of the 1994 IEEE International Symposium on Circuits and Systems, ISCAS 1994, London, England, UK, May 30, 1994

On Design of Analogue Multipliers using Gallium Arsenide MESFETs.
Proceedings of the 1994 IEEE International Symposium on Circuits and Systems, ISCAS 1994, London, England, UK, May 30, 1994

1993
Compensation of 2nd Harmonic Distortion in a 4-FET Linearised Transconductor Circuit.
Proceedings of the 1993 IEEE International Symposium on Circuits and Systems, 1993

A Systematic Method for Nonlinear Analysis of a Class of FET Circuits.
Proceedings of the 1993 IEEE International Symposium on Circuits and Systems, 1993


  Loading...