David J. Comer

According to our database1, David J. Comer authored at least 11 papers between 1999 and 2008.

Collaborative distances:
  • Dijkstra number2 of six.
  • Erdős number3 of five.

Awards

IEEE Fellow

IEEE Fellow 2005, "For leadership in engineering education and publication of electronic circuit design textbooks.".

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Other 

Links

Homepage:

On csauthors.net:

Bibliography

2008
Bulk-driven gain-enhanced fully-differential amplifier for VT + 2Vdsat operation.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2008), 2008

2006
Mitigating ISI Through Self-Calibrating Continuous-Time Equalization.
IEEE Trans. on Circuits and Systems, 2006

Multibit Delta-Sigma Modulator With Two-Step Quantization and Segmented DAC.
IEEE Trans. on Circuits and Systems, 2006

Bandwidth Extension of High-Gain CMOS Stages Using Active Negative Capacitance.
Proceedings of the 13th IEEE International Conference on Electronics, 2006

2005
Optimization of MOS amplifier performance through channel length and inversion level selection.
IEEE Trans. on Circuits and Systems, 2005

2004
Operation of analog MOS circuits in the weak or moderate inversion region.
IEEE Trans. Education, 2004

Using the weak inversion region to optimize input stage design of CMOS op amps.
IEEE Trans. on Circuits and Systems, 2004

A programmable floating-gate voltage reference in 0.5 μm CMOS.
Proceedings of the IEEE 2004 Custom Integrated Circuits Conference, 2004

2001
Teaching MOS integrated circuit amplifier design to undergraduates.
IEEE Trans. Education, 2001

2000
A new amplifier circuit with both practical and tutorial value.
IEEE Trans. Education, 2000

1999
Bipolar Junction Transistor (BJT) Circuits.
Proceedings of the VLSI Handbook., 1999


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