Debdut Biswas

Orcid: 0000-0002-1825-5082

According to our database1, Debdut Biswas authored at least 3 papers between 2019 and 2022.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of five.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
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Links

On csauthors.net:

Bibliography

2022
Spur Reduction Circuit for Fractional-N PLLs.
Circuits Syst. Signal Process., 2022

2019
Spur reduction architecture for multiphase fractional PLLs.
IET Circuits Devices Syst., 2019

A Model of Spurs for Delta-Sigma Fractional PLLs.
Proceedings of the 32nd International Conference on VLSI Design and 18th International Conference on Embedded Systems, 2019


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