Deependra Talla

According to our database1, Deependra Talla authored at least 6 papers between 1999 and 2003.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
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Links

On csauthors.net:

Bibliography

2003
Bottlenecks in Multimedia Processing with SIMD Style Extensions and Architectural Enhancements.
IEEE Trans. Computers, 2003

2001
MediaBreeze: a decoupled architecture for accelerating multimedia applications.
SIGARCH Comput. Archit. News, 2001

Cost-effective Hardware Acceleration of Multimedia Applications.
Proceedings of the 19th International Conference on Computer Design (ICCD 2001), 2001

2000
Allowing for ILP in an embedded Java processor.
Proceedings of the 27th International Symposium on Computer Architecture (ISCA 2000), 2000

Evaluating Signal Processing and Multimedia Applications on SIMD, VLIW and Superscalar Architectures.
Proceedings of the IEEE International Conference On Computer Design: VLSI In Computers & Processors, 2000

1999
Performance Evaluation and Benchmarking of Native Signal Processing.
Proceedings of the Euro-Par '99 Parallel Processing, 5th International Euro-Par Conference, Toulouse, France, August 31, 1999


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