Devrim Yilmaz Aksin

Orcid: 0000-0002-6314-6088

According to our database1, Devrim Yilmaz Aksin authored at least 23 papers between 2002 and 2017.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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Bibliography

2017
A 0.4-V Supply Curvature-Corrected Reference Generator With 84.5-ppm/°C Average Temperature Coefficient Within -40 °C to 130 °C.
IEEE Trans. Circuits Syst. II Express Briefs, 2017

A low-power low-noise CMOS voltage reference with improved PSR for wearable sensor systems.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2017

2016
Design of a compact and low supply voltage CMOS voltage reference generator.
Proceedings of the 2016 IEEE International Conference on Electronics, Circuits and Systems, 2016

2015
Voltage reference architectures for low-supply-voltage low-power applications.
Microelectron. J., 2015

Design of an op-amp free voltage reference with PWM regulation.
Proceedings of the European Conference on Circuit Theory and Design, 2015

2014
Untrimmed 6.2 ppm/°C bulk-isolated curvature-corrected bandgap voltage reference.
Integr., 2014

Sampled-data operational-amplifier with ultra-low supply voltage and sub µW power consumption.
Proceedings of the IEEE International Symposium on Circuits and Systemss, 2014

A 50V input range 14bit 250kS/s ADC with 97.8dB SFDR and 80.2dB SNR.
Proceedings of the ESSCIRC 2014, 2014

A 490-nA, 43-ppm/°C, sub-0.8-V supply voltage reference.
Proceedings of the ESSCIRC 2014, 2014

2013
Fully Integrated Frequency Reference With 1.7 ppm Temperature Accuracy Within 0-80°C.
IEEE J. Solid State Circuits, 2013

A frequency to voltage converter based on an accurate pulse width modulator for frequency locked loops.
Proceedings of the 4th IEEE Latin American Symposium on Circuits and Systems, 2013

2012
Design of a curvature-corrected bandgap reference with 7.5ppm/C temperature coefficient in 0.35µm CMOS process.
Proceedings of the 2012 IEEE International Symposium on Circuits and Systems, 2012

2010
Multi-rate segmented time-interleaved current steering DAC with unity-elements sharing.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2010), May 30, 2010

2009
25V sampling switch for power management data converters in 0.35µm CMOS with DNMOS.
Proceedings of the 35th European Solid-State Circuits Conference, 2009

Single-ended input four-quadrant multiplier for analog neural networks.
Proceedings of the 19th European Conference on Circuit Theory and Design, 2009

2007
An 11 Bit Sub-Ranging SAR ADC with Input Signal Range of Twice Supply Voltage.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2007), 2007

2006
Switch Bootstrapping for Precise Sampling Beyond Supply Voltage.
IEEE J. Solid State Circuits, 2006

2005
A compact distance cell for analog classifiers.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2005), 2005

Symbolic small-signal analysis (SSA) tool.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2005), 2005

High-efficiency power amplifier for wireless sensor networks.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2005), 2005

Non-linear behavioral model of a bipolar track and hold amplifier for high-speed and high-resolution ADCs.
Proceedings of the 12th IEEE International Conference on Electronics, 2005

A bootstrapped switch for precise sampling of inputs with signal range beyond supply voltage.
Proceedings of the IEEE 2005 Custom Integrated Circuits Conference, 2005

2002
Very high-speed BJT buffer for track-and-hold amplifiers with enhanced linearity.
Proceedings of the 2002 International Symposium on Circuits and Systems, 2002


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