Edoardo Bonizzoni

According to our database1, Edoardo Bonizzoni authored at least 98 papers between 2004 and 2020.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

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PhD thesis 
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Online presence:

On csauthors.net:

Bibliography

2020
A SAR-ADC-Assisted DC-DC Buck Converter With Fast Transient Recovery.
IEEE Trans. Circuits Syst. II Express Briefs, 2020

A 1-V, 3-GHz Strong-Arm Latch Voltage Comparator for High Speed Applications.
IEEE Trans. Circuits Syst., 2020

Guest Editorial Special Issue on the 2020 ISICAS: A CAS Journal Track Symposium.
IEEE Trans. Circuits Syst. II Express Briefs, 2020

Guest Editorial Special Issue on the 2020 IEEE International Symposium on Circuits and Systems.
IEEE Trans. Circuits Syst. II Express Briefs, 2020

A 170.7-dB FoM-DR 0.45/0.6-V Inverter-Based Continuous-Time Sigma-Delta Modulator.
IEEE Trans. Circuits Syst. II Express Briefs, 2020

6.25 GHz, 1 mV input resolution auxiliary circuit assisted comparator in 65 nm CMOS process.
IET Circuits Devices Syst., 2020

Multi-Bit Incremental Converters with Optimal Power Consumption and Mismatch Error.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2020

A 1.5-ns Switching Time, 9-Bit Current-Mode DAC for High Speed Laser Diode Drivers.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2020

Innovative Engineering Education in Circuits & Systems.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2020

On the Design of High Switching Frequency DC-DC Buck Converter Power Stages for Automotive Post-Regulated Applications.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2020

Linearity Boosting Technique Analysis for a Modified Current-Mode Bandgap Reference.
Proceedings of the 27th IEEE International Conference on Electronics, Circuits and Systems, 2020

A Power-Efficient Hybrid Single-Inductor Bipolar-Output DC-DC Converter with Floating Negative Output for AMOLED Displays.
Proceedings of the 2020 IEEE Custom Integrated Circuits Conference, 2020

2019
An 86% Efficiency, Wide-V <sub>in</sub> SIMO DC-DC Converter Embedded in a Car-Radio IC.
IEEE Trans. Circuits Syst. I Regul. Pap., 2019

Guest Editorial Special Issue on the 2019 ISICAS: A CAS Journal Track Symposium.
IEEE Trans. Circuits Syst. II Express Briefs, 2019

An Integrated Micromachined Thermopile Sensor With a Chopper Interface Circuit for Contact-Less Temperature Measurements.
IEEE Trans. Circuits Syst. I Regul. Pap., 2019

Analysis of Parasitic Effects in Filamentary-Switching Memristive Memories Using an Approximated Verilog-A Memristor Model.
IEEE Trans. Circuits Syst. I Regul. Pap., 2019

An Integrated Thermopile-Based Sensor with a Chopper-Stabilized Interface Circuit for Presence Detection.
Sensors, 2019

A Behavioral Model for Solar Cells With Transient Irradiation and Temperature Assessment.
IEEE Access, 2019

Current Conveyor based Novel Gyrator filter for Biomedical Sensor Applications.
Proceedings of the TENCON 2019, 2019

A 5-Bit 10-GS/sec Flash ADC with Resolution Enhancement using Metastability Detection.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2019

A Chopper Interface Circuit for Thermopile-Based Thermal Sensors.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2019

Study of DAC Architectures for Integrated Laser Driver Systems.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2019

Performance Comparison of a Strong-Arm Latch in Different Ultra-Scaled Technologies.
Proceedings of the 26th IEEE International Conference on Electronics, Circuits and Systems, 2019

A 11.3-ppm/°C, Two Temperature Points Trimmed Current Generator for Precise RC Oscillators.
Proceedings of the 26th IEEE International Conference on Electronics, Circuits and Systems, 2019

2018
A Voltage-Time Model for Memristive Devices.
IEEE Trans. Very Large Scale Integr. Syst., 2018

Guest Editorial Special Issue on the 2018 ISICAS: A CAS Journal Track Symposium.
IEEE Trans. Circuits Syst. II Express Briefs, 2018

Capacitance Super Multiplier for Sub-Hertz Low-Pass Integrated Filters.
IEEE Trans. Circuits Syst. II Express Briefs, 2018

A 10-MHz Bandwidth Two-Path Third-Order ΣΔ Modulator With Cross-Coupling Branches.
IEEE Trans. Circuits Syst. II Express Briefs, 2018

A Novel Low Power G m-C Continuous-Time Analog Filter with Wide Tuning Range.
Proceedings of the 31st International Conference on VLSI Design and 17th International Conference on Embedded Systems, 2018

Design of a SIBO DC-DC Converter for AMOLED Display Driving.
Proceedings of the 14th Conference on Ph.D. Research in Microelectronics and Electronics, 2018

An Asynchronous Analog to Digital Converter for Surveillance Camera Applications.
Proceedings of the 2018 IEEE Computer Society Annual Symposium on VLSI, 2018

An 86% efficiency SIMO DC-DC converter with one boost, one buck, and a floating output voltage for car-radio.
Proceedings of the 2018 IEEE International Solid-State Circuits Conference, 2018

A Low-Power Auxiliary Circuit for Level-Crossing ADCs in IoT-Sensor Applications.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2018

Design Considerations for Integrated, High-Voltage DC-DC Converters.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2018

An Approximated Verilog-A Model for Memristive Devices.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2018

UWB Tracking for Home Care Systems with Off-the-Shelf Components.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2018

A Timing Skew Calibration Method for Time-Interleaved FATI ADCs.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2018

2017
High-Resolution Time-Interleaved Eight-Channel ADC for Li-Ion Battery Stacks.
IEEE Trans. Circuits Syst. II Express Briefs, 2017

A 0.4-V Supply Curvature-Corrected Reference Generator With 84.5-ppm/°C Average Temperature Coefficient Within -40 °C to 130 °C.
IEEE Trans. Circuits Syst. II Express Briefs, 2017

Feasibility Study of an Ultra High Speed Current-Mode SAR ADC.
Proceedings of the New Generation of CAS, 2017

A Cross-Coupled Redundant Sense Amplifier for Radiation Hardened SRAMs.
Proceedings of the New Generation of CAS, 2017

A high-speed level shifting technique and its application in high-voltage, synchronous DC-DC converters with quasi-ZVS.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2017

A low-power low-noise CMOS voltage reference with improved PSR for wearable sensor systems.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2017

2016
A 10-b 200-kS/s 250-nA Self-Clocked Coarse-Fine SAR ADC.
IEEE Trans. Circuits Syst. II Express Briefs, 2016

A capacitive sensor interface for high-resolution acquisitions in hostile environments.
Proceedings of the IEEE 7th Latin American Symposium on Circuits & Systems, 2016

Very-low-voltage and ultra-low-power analog circuits for nomadic applications.
Proceedings of the IEEE 7th Latin American Symposium on Circuits & Systems, 2016

A pipeline ADC for very high conversion rates.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2016

Mismatch and parasitics limits in capacitors-based SAR ADCs.
Proceedings of the 2016 IEEE International Conference on Electronics, Circuits and Systems, 2016

Design of a compact and low supply voltage CMOS voltage reference generator.
Proceedings of the 2016 IEEE International Conference on Electronics, Circuits and Systems, 2016

An 8-bit 0.7-GS/s single channel flash-SAR ADC in 65-nm CMOS technology.
Proceedings of the ESSCIRC Conference 2016: 42<sup>nd</sup> European Solid-State Circuits Conference, 2016

2015
A CMOS Current-Mode Magnetic Hall Sensor With Integrated Front-End.
IEEE Trans. Circuits Syst. I Regul. Pap., 2015

Voltage reference architectures for low-supply-voltage low-power applications.
Microelectron. J., 2015

A split transconductor high-speed SAR ADC.
Proceedings of the 2015 IEEE International Symposium on Circuits and Systems, 2015

A single Op-Amp 0+2 sigma-delta modulator.
Proceedings of the 2015 IEEE International Symposium on Circuits and Systems, 2015

Design of a low power time to digital converter for flow metering applications.
Proceedings of the 2015 IEEE International Symposium on Circuits and Systems, 2015

Design of an op-amp free voltage reference with PWM regulation.
Proceedings of the European Conference on Circuit Theory and Design, 2015

2014
Interconnecting zigbee and bluetooth networks with BLupZi.
Proceedings of the 12th ACM Conference on Embedded Network Sensor Systems, 2014

A 2+1 multi-bit incremental architecture using Smart-DEM algorithm.
Proceedings of the IEEE International Symposium on Circuits and Systemss, 2014

A current-mode CMOS integrated microsystem for current spinning magnetic hall sensors.
Proceedings of the IEEE International Symposium on Circuits and Systemss, 2014

Sampled-data operational-amplifier with ultra-low supply voltage and sub µW power consumption.
Proceedings of the IEEE International Symposium on Circuits and Systemss, 2014

A 490-nA, 43-ppm/°C, sub-0.8-V supply voltage reference.
Proceedings of the ESSCIRC 2014, 2014

2013
Two-Path Quadrature Cascaded Band-Pass Sigma-Delta Modulators.
Proceedings of the 26th International Conference on VLSI Design and 12th International Conference on Embedded Systems, 2013

A 1.96-mW, 2.6-MHz bandwidth discrete time quadrature band-pass ΣΔ modulator.
Proceedings of the 2013 IEEE International Symposium on Circuits and Systems (ISCAS2013), 2013

High-order multi-bit incremental converter with Smart-DEM algorithm.
Proceedings of the 2013 IEEE International Symposium on Circuits and Systems (ISCAS2013), 2013

Design of a third-order ΣΔ modulator with minimum op-amps output swing.
Proceedings of the 2013 IEEE International Symposium on Circuits and Systems (ISCAS2013), 2013

2012
A 88-dB DR, 84-dB SNDR Very Low-Power Single Op-Amp Third-Order Σ Δ Modulator.
IEEE J. Solid State Circuits, 2012

Interference rejection in delay line based quadrature band-pass ΣΔ modulators.
Proceedings of the 2012 IEEE International Symposium on Circuits and Systems, 2012

A 1-V 1.1-MHz BW digitally assisted multi-bit multi-rate hybrid CT ΣΔ with 78-dB SFDR.
Proceedings of the 2012 IEEE International Symposium on Circuits and Systems, 2012

An incremental ADC sensor interface with input switch-Less integrator featuring 220-nVrms resolution with ±30-mV input range.
Proceedings of the 38th European Solid-State Circuit conference, 2012

2011
A 84dB SNDR 100kHz bandwidth low-power single op-amp third-order ΔΣ modulator consuming 140μW.
Proceedings of the IEEE International Solid-State Circuits Conference, 2011

A low-power third-order ΔΣ modulator using a single operational amplifier.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2011), 2011

Digital assisted high-order multi-bit analog to digital ramp converters.
Proceedings of the 20th European Conference on Circuit Theory and Design, 2011

2010
A Micropower Chopper - CDS Operational Amplifier.
IEEE J. Solid State Circuits, 2010

A micropower chopper-correlated double-sampling amplifier with 2µV standard deviation offset and 37nV/√Hz input noise density.
Proceedings of the IEEE International Solid-State Circuits Conference, 2010

Digitally assisted multi-Bit ΣΔ modulator.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2010), May 30, 2010

Design of a 70-MHz IF 10-MHz bandwidth bandpass ΣΔ modulator for WCDMA applications.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2010), May 30, 2010

Low-power ripple-free chopper amplifier with correlated double sampling de-chopping.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2010), May 30, 2010

A two op-amps third-order ΣΔ modulator with complex conjugate NTF zeros.
Proceedings of the 17th IEEE International Conference on Electronics, 2010

Pseudorandom sequence generation for mismatch analog compensation of ADCs.
Proceedings of the 17th IEEE International Conference on Electronics, 2010

2009
Slew-rate and Gain Enhancement in Two Stage Operational Amplifiers.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2009), 2009

High efficiency DC-DC buck converter with 60/120-MHz switching frequency and 1-A output current.
Proceedings of the 35th European Solid-State Circuits Conference, 2009

2008
40 MHz IF 1 MHz Bandwidth Two-Path Bandpass ΣΔ Modulator With 72 dB DR Consuming 16 mW.
IEEE J. Solid State Circuits, 2008

A 4-Output Single-Inductor DC-DC Buck Converter with Self-Boosted Switch Drivers and 1.2A Total Output Current.
Proceedings of the 2008 IEEE International Solid-State Circuits Conference, 2008

A 9.4-ENOB 1V 3.8μW 100kS/s SAR ADC with Time-Domain Comparator.
Proceedings of the 2008 IEEE International Solid-State Circuits Conference, 2008

Band-pass SigmaDelta architectures with single and two parallel paths.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2008), 2008

On the design of single-inductor multiple-output DC-DC buck converters.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2008), 2008

Design of an ultra-low power SA-ADC with medium/high resolution and speed.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2008), 2008

On the design of single-inductor double-output DC-DC buck, boost and buck-boost converters.
Proceedings of the 15th IEEE International Conference on Electronics, Circuits and Systems, 2008

Third-order ΣΔ modulator with 61-dB SNR and 6-MHz bandwidth consuming 6 mW.
Proceedings of the ESSCIRC 2008, 2008

2007
Staircase-down SET programming approach for phase-change memories.
Microelectron. J., 2007

A 200mA 93% Peak Efficiency Single-Inductor Dual-Output DC-DC Buck Converter.
Proceedings of the 2007 IEEE International Solid-State Circuits Conference, 2007

A Low Power Sinc3 Filter for Sigma-Delta Modulators.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2007), 2007

2006
Set-sweep programming pulse for phase-change memories.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2006), 2006

A low-ripple voltage tripler.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2006), 2006

2005
SET and RESET pulse characterization in BJT-selected phase-change memories.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2005), 2005

Heap charge pump optimisation by a tapered architecture.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2005), 2005

2004
A fully symmetrical sense amplifier for non-volatile memories.
Proceedings of the 2004 International Symposium on Circuits and Systems, 2004

A low-power low-voltage MOSFET-only voltage reference.
Proceedings of the 2004 International Symposium on Circuits and Systems, 2004


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